Question 1 |

A stack organized computer is characterised by instructions with

indirect addressing | |

direct addressing | |

zero addressing | |

index addressing |

Question 1 Explanation:

Question 2 |

An array of 2 two byte integers is stored in big endian machine in byte addresses as shown below. What will be its storage pattern in little endian machine ?

\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&78\\0 \times 103&56\\0 \times 102&34\\0 \times 101&12\end{array}

\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&78\\0 \times 103&56\\0 \times 102&34\\0 \times 101&12\end{array}

\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&12\\0 \times 103&56\\0 \times 102&34\\0 \times 101&78\end{array} | |

\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&12\\0 \times 103&34\\0 \times 102&56\\0 \times 101&78\end{array} \\ | |

\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&56\\0 \times 103&78\\0 \times 102&12\\0 \times 101&34\end{array} \\ | |

\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&56\\0 \times 103&12\\0 \times 102&78\\0 \times 101&34\end{array} |

Question 2 Explanation:

Question 3 |

The immediate addressing mode can be used for

1. Loading internal registers with initial values

2. Perform arithmetic or logical operation on data contained in instructions

Which of the following is true?

1. Loading internal registers with initial values

2. Perform arithmetic or logical operation on data contained in instructions

Which of the following is true?

Only 1 | |

Only 2 | |

Both 1 and 2 | |

Immediate mode refers to data in cache |

Question 3 Explanation:

Question 4 |

The most appropriate matching for the following pairs:

\begin{array}{|l|l|l|l|} \hline \text{X.} & \text{Indirect Addressing} & i. & \text{Loop} \\ \hline \text{Y.} & \text{Immediate Addressing} & ii. & \text{Pointers} \\ \hline \text{Z.} & \text{Auto Decrement Addressing} & iii. & \text{Constants} \\ \hline \end{array}

\begin{array}{|l|l|l|l|} \hline \text{X.} & \text{Indirect Addressing} & i. & \text{Loop} \\ \hline \text{Y.} & \text{Immediate Addressing} & ii. & \text{Pointers} \\ \hline \text{Z.} & \text{Auto Decrement Addressing} & iii. & \text{Constants} \\ \hline \end{array}

X-iii, Y-ii, Z-i | |

X-ii, Y-iii, Z-i | |

X-iii, Y-i, Z-ii | |

X-ii, Y-i, Z-iii |

Question 4 Explanation:

Question 5 |

Consider a RISC machine where each instruction is exactly 4 bytes long. Conditional and
unconditional branch instructions use PC- relative addressing mode with Offset specified in
bytes to the target location of the branch instruction. Further the Offset is always with respect
to the address of the next instruction in the program sequence. Consider the following
instruction sequence.

If the target of the branch instruction is i, then the decimal value of the Offset is __________

If the target of the branch instruction is i, then the decimal value of the Offset is __________

-16 | |

-12 | |

-8 | |

16 |

Question 5 Explanation:

There are 5 questions to complete.

In the second question, C code is missing the ‘grade’ in the struct data. Please edit.

Thank you for your suggestions. We have updated the correction suggested by You.

In ques. 19, statement is “In the absolute addressing mode:”. Kindly correct it.

Is this covered all the pYq from 2001 to 2023?

Year it covers all GATE and ISRO Previous year questions from GATE 1987 to GATE 2023 and all ISRO Previous year questions.