Question 1 |
A stack organized computer is characterised by instructions with
indirect addressing | |
direct addressing | |
zero addressing | |
index addressing |
Question 1 Explanation:
Question 2 |
An array of 2 two byte integers is stored in big endian machine in byte addresses as shown below. What will be its storage pattern in little endian machine ?
\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&78\\0 \times 103&56\\0 \times 102&34\\0 \times 101&12\end{array}
\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&78\\0 \times 103&56\\0 \times 102&34\\0 \times 101&12\end{array}
\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&12\\0 \times 103&56\\0 \times 102&34\\0 \times 101&78\end{array} | |
\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&12\\0 \times 103&34\\0 \times 102&56\\0 \times 101&78\end{array} \\ | |
\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&56\\0 \times 103&78\\0 \times 102&12\\0 \times 101&34\end{array} \\ | |
\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&56\\0 \times 103&12\\0 \times 102&78\\0 \times 101&34\end{array} |
Question 2 Explanation:
Question 3 |
The immediate addressing mode can be used for
1. Loading internal registers with initial values
2. Perform arithmetic or logical operation on data contained in instructions
Which of the following is true?
1. Loading internal registers with initial values
2. Perform arithmetic or logical operation on data contained in instructions
Which of the following is true?
Only 1 | |
Only 2 | |
Both 1 and 2 | |
Immediate mode refers to data in cache |
Question 3 Explanation:
Question 4 |
The most appropriate matching for the following pairs:
\begin{array}{|l|l|l|l|} \hline \text{X.} & \text{Indirect Addressing} & i. & \text{Loop} \\ \hline \text{Y.} & \text{Immediate Addressing} & ii. & \text{Pointers} \\ \hline \text{Z.} & \text{Auto Decrement Addressing} & iii. & \text{Constants} \\ \hline \end{array}
\begin{array}{|l|l|l|l|} \hline \text{X.} & \text{Indirect Addressing} & i. & \text{Loop} \\ \hline \text{Y.} & \text{Immediate Addressing} & ii. & \text{Pointers} \\ \hline \text{Z.} & \text{Auto Decrement Addressing} & iii. & \text{Constants} \\ \hline \end{array}
X-iii, Y-ii, Z-i | |
X-ii, Y-iii, Z-i | |
X-iii, Y-i, Z-ii | |
X-ii, Y-i, Z-iii |
Question 4 Explanation:
Question 5 |
Consider a RISC machine where each instruction is exactly 4 bytes long. Conditional and
unconditional branch instructions use PC- relative addressing mode with Offset specified in
bytes to the target location of the branch instruction. Further the Offset is always with respect
to the address of the next instruction in the program sequence. Consider the following
instruction sequence.

If the target of the branch instruction is i, then the decimal value of the Offset is __________

If the target of the branch instruction is i, then the decimal value of the Offset is __________
-16 | |
-12 | |
-8 | |
16 |
Question 5 Explanation:
Question 6 |
Consider the C struct defined below:
struct data {
int marks [100] ;
char grade;
int cnumber;
};
struct data student;
The base address of student is available in register R1. The field student.grade can be
accessed efficiently usingPost-increment addressing mode. (R1)+ | |
Pre-decrement addressing mode, -(R1) | |
Register direct addressing mode, R1 | |
Index addressing mode, X(R1), where X is an offset represented in 2's complement 16-bit representation |
Question 6 Explanation:
Question 7 |
Relative mode of addressing is most relevant to writing:
Co - routines | |
Position - independent code | |
Shareable code | |
Interrupt Handlers |
Question 7 Explanation:
Question 8 |
For computers based on three-address instruction formats, each address field can be used to specify which of the following:
(S1) A memory operand
(S2) A processor register
(S3) An implied accumulator register
(S1) A memory operand
(S2) A processor register
(S3) An implied accumulator register
Either S1 or S2 | |
Either S2 or S3 | |
Only S2 and S3 | |
All of S1, S2 and S3 |
Question 8 Explanation:
Question 9 |
MOV [BX], AL type of data addressing is called ?
register | |
immediate | |
register indirect | |
register relative |
Question 9 Explanation:
Question 10 |
Consider a hypothetical processor with an instruction of type LW R1, 20(R2),
which during execution reads a 32-bit word from memory and stores it in a 32-bit
register R1. The effective address of the memory location is obtained by the
addition of constant 20 and the contents of register R2. Which of the following
best reflects the Addressing Modes implemented by this instruction for the
operand in memory?
Immediate Addressing | |
Register Addressing | |
Register Indirect Scaled Addressing | |
Base Indexed Addressing |
Question 10 Explanation:
There are 10 questions to complete.
In the second question, C code is missing the ‘grade’ in the struct data. Please edit.
Thank you for your suggestions. We have updated the correction suggested by You.
In ques. 19, statement is “In the absolute addressing mode:”. Kindly correct it.