Addressing Modes

Question 1
A stack organized computer is characterised by instructions with
A
indirect addressing
B
direct addressing
C
zero addressing
D
index addressing
ISRO CSE 2020   Computer Organization
Question 2
An array of 2 two byte integers is stored in big endian machine in byte addresses as shown below. What will be its storage pattern in little endian machine ?
\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&78\\0 \times 103&56\\0 \times 102&34\\0 \times 101&12\end{array}
A
\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&12\\0 \times 103&56\\0 \times 102&34\\0 \times 101&78\end{array}
B
\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&12\\0 \times 103&34\\0 \times 102&56\\0 \times 101&78\end{array} \\
C
\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&56\\0 \times 103&78\\0 \times 102&12\\0 \times 101&34\end{array} \\
D
\begin{array}{c|c}\text{Address}& \text{Data}\\\hline0 \times 104&56\\0 \times 103&12\\0 \times 102&78\\0 \times 101&34\end{array}
ISRO CSE 2020   Computer Organization
Question 3
The immediate addressing mode can be used for
1. Loading internal registers with initial values
2. Perform arithmetic or logical operation on data contained in instructions
Which of the following is true?
A
Only 1
B
Only 2
C
Both 1 and 2
D
Immediate mode refers to data in cache
ISRO CSE 2020   Computer Organization
Question 4
The most appropriate matching for the following pairs:
\begin{array}{|l|l|l|l|} \hline \text{X.} & \text{Indirect Addressing} & i. & \text{Loop} \\ \hline \text{Y.} & \text{Immediate Addressing} & ii. & \text{Pointers} \\ \hline \text{Z.} & \text{Auto Decrement Addressing} & iii. & \text{Constants} \\ \hline \end{array}
A
X-iii, Y-ii, Z-i
B
X-ii, Y-iii, Z-i
C
X-iii, Y-i, Z-ii
D
X-ii, Y-i, Z-iii
ISRO CSE 2017   Computer Organization
Question 5
Consider a RISC machine where each instruction is exactly 4 bytes long. Conditional and unconditional branch instructions use PC- relative addressing mode with Offset specified in bytes to the target location of the branch instruction. Further the Offset is always with respect to the address of the next instruction in the program sequence. Consider the following instruction sequence.

If the target of the branch instruction is i, then the decimal value of the Offset is __________
A
-16
B
-12
C
-8
D
16
GATE CSE 2017 SET-1   Computer Organization
Question 6
Consider the C struct defined below:
struct data {
int marks [100] ;
char grade;
int cnumber;
};
struct data student;
The base address of student is available in register R1. The field student.grade can be accessed efficiently using
A
Post-increment addressing mode. (R1)+
B
Pre-decrement addressing mode, -(R1)
C
Register direct addressing mode, R1
D
Index addressing mode, X(R1), where X is an offset represented in 2's complement 16-bit representation
GATE CSE 2017 SET-1   Computer Organization
Question 7
Relative mode of addressing is most relevant to writing:
A
Co - routines
B
Position - independent code
C
Shareable code
D
Interrupt Handlers
ISRO CSE 2016   Computer Organization
Question 8
For computers based on three-address instruction formats, each address field can be used to specify which of the following:
(S1) A memory operand
(S2) A processor register
(S3) An implied accumulator register
A
Either S1 or S2
B
Either S2 or S3
C
Only S2 and S3
D
All of S1, S2 and S3
GATE CSE 2015 SET-1   Computer Organization
Question 9
MOV [BX], AL type of data addressing is called ?
A
register
B
immediate
C
register indirect
D
register relative
ISRO CSE 2011   Computer Organization
Question 10
Consider a hypothetical processor with an instruction of type LW R1, 20(R2), which during execution reads a 32-bit word from memory and stores it in a 32-bit register R1. The effective address of the memory location is obtained by the addition of constant 20 and the contents of register R2. Which of the following best reflects the Addressing Modes implemented by this instruction for the operand in memory?
A
Immediate Addressing
B
Register Addressing
C
Register Indirect Scaled Addressing
D
Base Indexed Addressing
GATE CSE 2011   Computer Organization
There are 10 questions to complete.

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