ALU Data Path and Control Unit


Question 1
Consider a digital display system (DDS) shown in the figure that displays the contents of register X. A 16-bit code word is used to load a word in X, either from S or from R. S is a 1024-word memory segment and R is a 32-word register file. Based on the value of mode bit M, T selects an input word to load in X. P and Q interface with the corresponding bits in the code word to choose the addressed word. Which one of the following represents the functionality of P, Q, and T?

A
P is 10:1 multiplexer;
Q is 5:1 multiplexer;
T is 2:1 multiplexer
B
P is 10:2^{10} decoder;
Q is 5:2^{5} decoder;
T is 2:1 encoder
C
P is 10:2^{10} decoder;
Q is 5:2^{5} decoder;
T is 2:1 multiplexer
D
P is 1:10 de-multiplexer;
Q is 1:5 de-multiplexer;
T is 2:1 multiplexer
GATE CSE 2022   Computer Organization
Question 2
Micro program is:
A
the name of a source program in micro computers
B
set of microinstructions that defines the individual operations in response to a machine-language instruction
C
a primitive form of macros used in assembly language programming
D
a very small segment of machine code
ISRO CSE 2018   Computer Organization


Question 3
Consider a main memory system that consists of 8 memory modules attached to the system bus, which is one word wide. When a write request is made, the bus is occupied for 100 nanoseconds (ns) by the data, address, and control signals. During the same 100 ns, and for 500 ns thereafter, the addressed memory module executes one cycle accepting and storing the data. The (internal) operation of different memory modules may overlap in time, but only one request can be on the bus at any time. The maximum number of stores (of one word each) that can be initiated in 1 millisecond is ____________
A
5000
B
10000
C
2000
D
8000
GATE CSE 2014 SET-2   Computer Organization
Question 4
Two control signals in microprocessor which are related to Direct Memory Access (DMA) are
A
INTR & INTA
B
RD & WR
C
S0 & S1
D
HOLD & HLDA
ISRO CSE 2011   Computer Organization
Question 5
The microinstructions stored in the control memory of a processor have a width of 26 bits. Each microinstruction is divided into three fields. a micro operation field of 13 bits, a next address field (X), and a MUX select field (Y). There are 8 status bits in the inputs of the MUX. How many bits are there in the X and Y fields, and what is the size of the control memory in number of words?
A
10, 3, 1024
B
8, 5, 256
C
5, 8, 2048
D
10, 3, 512
ISRO CSE 2009   Computer Organization


There are 5 questions to complete.

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