Question 1 |

Which one of the following circuits implements the Boolean function given below?

f(x,y,z) = m_0+m_1+m_3+m_4+m_5+m_6

where m_i is the i^{th} minterm.

f(x,y,z) = m_0+m_1+m_3+m_4+m_5+m_6

where m_i is the i^{th} minterm.

A | |

B | |

C | |

D |

Question 1 Explanation:

Question 2 |

Consider the following circuit

The function by the network above is

The function by the network above is

\overline{A B} E+E F+\overline{C D} F | |

(\bar{E}+A B \bar{F})(C+D+\bar{F}) | |

(\overline{A B}+E)(\bar{E}+\bar{F})(C+D+\bar{F}) | |

(A+B) \bar{E}+\overline{E F}+C D \bar{F} |

Question 2 Explanation:

Question 3 |

Following Multiplexer circuit is equivalent to

Sum equation of full adder | |

Carry equation of full adder | |

Borrow equation for full subtractor | |

Difference equation of a full subtractor |

Question 3 Explanation:

Question 4 |

In a 8-bit ripple carry adder using identical full adders, each full adder takes 34 ns for computing sum. If the time taken for 8-bit addition is 90 ns, find time taken by each full adder to find carry.

6 ns | |

7 ns | |

10 ns | |

8 ns |

Question 4 Explanation:

Question 5 |

If there are m input lines and n output lines for a decoder that is used to uniquely address a byte addressable 1 KB RAM, then the minimum value of m+n is ________ .

20 | |

2048 | |

1034 | |

1024 |

Question 5 Explanation:

Question 6 |

A multiplexer is placed between a group of 32 registers and an accumulator to regulate data movement such that at any given point in time the content of only one register will move to the accumulator. The number of select lines needed for the multiplexer is ______.

8 | |

32 | |

5 | |

6 |

Question 6 Explanation:

Question 7 |

When two 8-bit numbers A_{7}....A_{0} and B_{7}....B_{0} in 2's complement representation (with A_{0}
and B_{0} as the least significant bits ) are added using a ripple-carry Combinational Circuit, the sum bits
obtained are S_{7}....S_{0} and the carry bits are C_{7}....C_{0}. An overflow is said to have occurred if

the carry bit C_{7} is 1 | |

all the carry bits (C_{7}....C_{0}) are 1 | |

(A_{7}B_{7}\bar{S_{7}}+\bar{A_{7}}\bar{B_{7}}S_{7}) is 1 | |

(A_{0}B_{0}\bar{S_{0}}+\bar{A_{0}}\bar{B_{0}}S_{0})
is 1 |

Question 7 Explanation:

Question 8 |

The circuit given in the figure below is

An oscillating circuit and its output is square wave | |

The one whose output remains stable in '1' state | |

The one having output remains stable in '0' state | |

has a single pulse of three times propagation delay |

Question 8 Explanation:

Question 9 |

The logic circuit given below converts a binary code y1, y2, y3 into

Excess-3 code | |

Gray code | |

BCD code | |

Hamming code |

Question 9 Explanation:

Question 10 |

For a binary half-subtractor having two inputs A and B, the correct set of logical outputs D(=A minus B) and X(=borrow) are

D=AB+\bar{A}B, X=\bar{A}B | |

D=\bar{A}B+A\bar{B}, X=A\bar{B} | |

D=\bar{A}B+A\bar{B}, X=\bar{A} B | |

D=AB+\bar{A}B, X=A\bar{B} |

Question 10 Explanation:

There are 10 questions to complete.

Question number 37, correct answer is option A. Please update it.

Thank You Aditya,

We have updated the option.

According to me correct answer for question 9 in combinational circuit should be gray code

Thank You PRAFUL SAMBHAJI RANE,

We have updated the answer.

question no. 39 is incomplete ….

pls update it