# Digital Logic

 Question 1
Consider a Boolean function $f(w,x,y,z)$ such that

$\begin{array}{lll} f(w,0,0,z) & = & 1 \\ f(1,x,1,z) & =& x+z \\ f(w,1,y,z) & = & wz +y \end{array}$

The number of literals in the minimal sum-of-products expression of $f$ is ________
 A 4 B 6 C 8 D 9
GATE CSE 2021 SET-2      Boolean Algebra
Question 1 Explanation:
 Question 2
If the numerical value of a 2-byte unsigned integer on a little endian computer is 255 more than that on a big endian computer, which of the following choices represent(s) the unsigned integer on a little endian computer?
[MSQ]
 A 0x6665 B 0x0001 C 0x4243 D 0x0100
GATE CSE 2021 SET-2      Number System
Question 2 Explanation:
 Question 3
If $x$ and $y$ are two decimal digits and $(0.1101)_2 = (0.8xy5)_{10}$, the decimal value of $x+y$ is ___________
 A 3 B 6 C 8 D 4
GATE CSE 2021 SET-2      Number System
Question 3 Explanation:
 Question 4
Which one of the following circuits implements the Boolean function given below?

$f(x,y,z) = m_0+m_1+m_3+m_4+m_5+m_6$

where $m_i$ is the $i^{th}$ minterm.

 A A B B C C D D
GATE CSE 2021 SET-2      Combinational Circuit
Question 4 Explanation:
 Question 5
The format of the single-precision floating point representation of a real number as per the IEEE 754 standard is as follows:

$\begin{array}{|c|c|c|} \hline \text{sign} & \text{exponent} & \text{mantissa} \\ \hline \end{array}$

Which one of the following choices is correct with respect to the smallest normalized positive number represented using the standard?
 A exponent = 00000000 and mantissa = 0000000000000000000000000 B exponent = 00000000 and mantissa = 0000000000000000000000001 C exponent = 00000001 and mantissa = 0000000000000000000000000 D exponent = 00000001 and mantissa = 0000000000000000000000001
GATE CSE 2021 SET-2      Number System
Question 5 Explanation:
 Question 6
Consider the following Boolean expression.

$F=(X+Y+Z)(\overline X +Y)(\overline Y +Z)$

Which of the following Boolean expressions is/are equivalent to $\overline F$ (complement of $F$)?
[MSQ]
 A $(\overline X +\overline Y +\overline Z)(X+\overline Y)(Y+\overline Z)$ B $X\overline Y + \overline Z$ C $(X+\overline Z)(\overline Y +\overline Z)$ D $X\overline Y +Y\overline Z + \bar X \bar Y \bar Z$
GATE CSE 2021 SET-1      Boolean Algebra
Question 6 Explanation:
 Question 7
Consider a 3-bit counter, designed using T flip-flops, as shown below:

Assuming the initial state of the counter given by PQR as 000, what are the next three states?
 A 011,101,000 B 001,010,111 C 011,101,111 D 001,010,000
GATE CSE 2021 SET-1      Sequential Circuit
Question 7 Explanation:
 Question 8
Consider the following representation of a number in IEEE 754 single-precision floating point format with a bias of 127.

S:1
E:10000001
F:11110000000000000000000

Here, S,E and F denote the sign, exponent, and fraction components of the floating point representation.

The decimal value corresponding to the above representation (rounded to 2 decimal places) is ____________.
 A -7.75 B 7.75 C -3.825 D 3.825
GATE CSE 2021 SET-1      Number System
Question 8 Explanation:
 Question 9
Let the representation of a number in base 3 be 210. What is the hexadecimal representation of the number?
 A 15 B 21 C D2 D 528
GATE CSE 2021 SET-1      Number System
Question 9 Explanation:
 Question 10
A new flipflop with inputs X and Y, has the following property
$\begin{array}{|c|c|c|c|} \hline \mathbf{X} & \mathbf{Y} & \text { Current state } & \text { Next state } \\ \hline 0 & 0 & Q & 1 \\ 0 & 1 & Q & \bar{Q} \\ 1 & 1 & Q & 0 \\ 1 & 0 & Q & Q \\ \hline \end{array}$
Which of the following expresses the next state in terms of X,Y, current state?
 A $(\bar{X} \wedge \bar{Q}) \vee(\bar{Y} \wedge Q)$ B $(\bar{X} \wedge {Q}) \vee(\bar{Y} \wedge \bar{Q})$ C $({X} \wedge \bar{Q}) \vee({Y} \wedge {Q})$ D $({X} \wedge \bar{Q}) \vee(\bar{Y} \wedge {Q})$
ISRO CSE 2020      Sequential Circuit
Question 10 Explanation:

There are 10 questions to complete.

### 9 thoughts on “Digital Logic”

1. Sir, Please mention the a,b,c value of question 2.

• Hi Ashutosh,
Here, value of a,b,c are not required. You can write the truth table based on above circuit. Then find the answer based on truth table. See the solution provided.

2. Question 5, Please update the answer from 4 minimum gate to 3 minimum gate.

• Hi Ashutosh,
Thank you for your suggestion. We have updated the answer from 4 to 3.

3. Q13 answer will be B…
Update it