GATE CSE 2015 SET-2

Question 1
Consider the following two statements.

S1: If a candidate is known to be corrupt, then he will not be elected
S2: If a candidate is kind, he will be elected

Which one of the following statements follows from S1 and S2 as per sound inference rules of logic?
A
If a person is known to be corrupt, he is kind
B
If a person is not known to be corrupt, he is not kind
C
If a person is kind, he is not known to be corrupt
D
If a person is not kind, he is not known to be corrupt
Discrete Mathematics   Propositional Logic
Question 2
The cardinality of the power set of { 0, 1, 2,..., 10 } is _________.
A
10
B
1024
C
2048
D
4096
Discrete Mathematics   Set Theory
Question 3
Let R be the relation on the set of positive integers such that aRb if and only if a and b are distinct and have a common divisor other than 1. Which one of the following statements about R is true?
A
R is symmetric and reflexive but not transitive
B
R is reflexive but not symmetric and not transitive
C
R is transitive but not reflexive and not symmetric
D
R is symmetric but not reflexive and not transitive
Discrete Mathematics   Relation
Question 4
The number of divisors of 2100 is _____ .
A
28
B
34
C
36
D
40
Discrete Mathematics   Combination
Question 5
The larger of the two eigenvalues of the matrix \begin{bmatrix} 4 & 5\\ 2&1 \end{bmatrix} is _______.
A
4
B
6
C
8
D
10
Engineering Mathematics   Linear Algebra
Question 6
An unordered list contains n distinct elements. The number of comparisons to find an element in this list that is neither maximum nor minimum is
A
\Theta (n log n)
B
\Theta (n)
C
\Theta (log n)
D
\Theta (1)
Data Structure   Link List
Question 7
The minimum number of JK flip-flops required to construct a synchronous counter with the count sequence (0,0,1,1,2,2,3,3,0,0,...) is __________ .
A
2
B
3
C
4
D
5
Digital Logic   Sequential Circuit
Question 8
Assume that for a certain processor, a read request takes 50 nanoseconds on a cache miss and 5 nanoseconds on a cache hit. Suppose while running a program, it was observed that 80% of the processor's read requests result in a cache hit. The average read access time in nanoseconds is __________.
A
14
B
42
C
18
D
48
Computer Organization   Cache Memory
Question 9
A computer system implements a 40-bit virtual address, page size of 8 kilobytes, and a 128-entry translation look-aside buffer (TLB) organized into 32 sets each having four ways. Assume that the TLB tag does not store any process id. The minimum length of the TLB tag in bits is _________.
A
27
B
5
C
22
D
7
Operating System   Memory Management
Question 10
Consider the following statements.
I. The complement of every Turing decidable language is Turing decidable
II. There exists some language which is in NP but is not Turing decidable
III. If L is a language in NP, L is Turing decidable

Which of the above statements is/are true?
A
Only II
B
Only III
C
Only I and II
D
Only I and III
Theory of Computation   Turing Machine
There are 10 questions to complete.

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