Question 1 |

Which one of the following is a closed form expression for the generating function of the sequence \left \{ a_{n} \right \}, where a_{n}=2n+3 for all n = 0, 1, 2,...?

\frac{3}{(1-x)^{2}} | |

\frac{3x}{(1-x)^{2}} | |

\frac{2-x}{(1-x)^{2}} | |

\frac{3-x}{(1-x)^{2}} |

Question 1 Explanation:

Question 2 |

Consider the following C program.

```
#include < stdio.h >
struct Ournode{
char x,y,z;
};
int main(){
struct Ournode p = {'1', '0','a'+2};
struct Ournode *q = &p;
printf("%c,%c",*((char*)q+1),*((char*)q+2));
return 0;
}
```

The output of this program is:0, c | |

0, a+2 | |

'0', 'a+2' | |

'0', 'c' |

Question 2 Explanation:

Question 3 |

A queue is implemented using a non-circular singly linked list. The queue has a head pointer and a tail pointer, as shown in the figure. Let n denote the number of nodes in the queue. Let enqueue be implemented by inserting a new node at the head, and dequeue be implemented by deletion of a node from the tail.

Which one of the following is the time complexity of the most time-efficient implementation of enqueue and dequeue, respectively, for this data structure?

Which one of the following is the time complexity of the most time-efficient implementation of enqueue and dequeue, respectively, for this data structure?

\Theta (1), \Theta (1) | |

\Theta (1), \Theta (n) | |

\Theta (n), \Theta (1) | |

\Theta (n), \Theta (n) |

Question 3 Explanation:

Question 4 |

Let \bigoplus and \bigodot denote the Exclusive OR and Exclusive NOR operations, respectively. Which one of the following is NOT CORRECT?

\overline{P \bigoplus Q}=P\bigodot Q | |

\overline{P} \bigoplus Q=P\bigodot Q | |

\overline{P} \bigoplus \overline{Q}=P\bigoplus Q | |

(P \bigoplus \overline{P})\bigoplus Q=(P\bigodot\overline{P})\bigodot \overline{Q} |

Question 4 Explanation:

Question 5 |

Consider the following processor design characteristics.

I. Register-to-register arithmetic operations only

II. Fixed-length instruction format

III. Hardwired control unit

Which of the characteristics above are used in the design of a RISC processor?

I. Register-to-register arithmetic operations only

II. Fixed-length instruction format

III. Hardwired control unit

Which of the characteristics above are used in the design of a RISC processor?

I and II only | |

II and III only | |

I and III only | |

I, II and III |

Question 5 Explanation:

Question 6 |

Let N be an NFA with n states. Let k be the number of states of a minimal DFA which is equivalent to N. Which one of the following is necessarily true?

k\geqslant 2^{n} | |

k\geqslant n | |

k\leqslant n^{2} | |

k\leqslant 2^{n} |

Question 6 Explanation:

Question 7 |

The set of all recursively enumerable languages is

closed under complementation | |

closed under intersection. | |

a subset of the set of all recursive languages. | |

an uncountable set |

Question 7 Explanation:

Question 8 |

Which one of the following statements is FALSE?

Context-free grammar can be used to specify both lexical and syntax rules. | |

Type checking is done before parsing. | |

High-level language programs can be translated to different Intermediate Representations. | |

Arguments to a function can be passed using the program stack. |

Question 8 Explanation:

Question 9 |

The following are some events that occur after a device controller issues an interrupt while process L is under execution.

(P) The processor pushes the process status of L onto the control stack.

(Q) The processor finishes the execution of the current instruction.

(R) The processor executes the interrupt service routine.

(S) The processor pops the process status of L from the control stack.

(T) The processor loads the new PC value based on the interrupt.

Which one of the following is the correct order in which the events above occur?

(P) The processor pushes the process status of L onto the control stack.

(Q) The processor finishes the execution of the current instruction.

(R) The processor executes the interrupt service routine.

(S) The processor pops the process status of L from the control stack.

(T) The processor loads the new PC value based on the interrupt.

Which one of the following is the correct order in which the events above occur?

QPTRS | |

PTRSQ | |

TRPQS | |

QTPRS |

Question 9 Explanation:

Question 10 |

Consider a process executing on an operating system that uses demand paging. The average time for a memory access in the system is M units if the corresponding memory page is available in memory, and D units if the memory access causes a page fault. It has been experimentally measured that the average time taken for a memory access in the process is X units.

Which one of the following is the correct expression for the page fault rate experienced by the process?

Which one of the following is the correct expression for the page fault rate experienced by the process?

(D - M) / (X - M) | |

(X - M) / (D - M) | |

(D - X) / (D - M) | |

(X - M) / (D - X) |

Question 10 Explanation:

There are 10 questions to complete.