Memory Management

 Question 1
Consider a demand paging system with four page frames (initially empty) and LRU page replacement policy. For the following page reference string

7, 2, 7, 3, 2, 5, 3, 4, 6, 7, 7,1, 5, 6,1

the page fault rate, defined as the ratio of number of page faults to the number of memory accesses (rounded off to one decimal place) is
 A 0.4 B 0.5 C 0.6 D 0.7
GATE CSE 2022   Operating System
Question 1 Explanation:
 Question 2
Which one of the following statements is FALSE?
 A The TLB performs an associative search in parallel on all its valid entries using page number of incoming virtual address. B If the virtual address of a word given by CPU has a TLB hit, but the subsequent search for the word results in a cache miss, then the word will always be present in the main memory. C The memory access time using a given inverted page table is always same for all incoming virtual addresses. D In a system that uses hashed page tables, if two distinct virtual addresses V1 and V2 map to the same value while hashing, then the memory access time of these addresses will not be the same.
GATE CSE 2022   Operating System
Question 2 Explanation:
 Question 3
Consider a three-level page table to translate a 39-bit virtual address to a physical address as shown below:

The page size is 4 KB = (1KB =$2^{10}$ bytes) and page table entry size at every level is 8 bytes. A process P is currently using 2 GB (1 GB =$2^{30}$ bytes) virtual memory which os mapped to 2 GB of physical memory. The minimum amount of memory required for the page table of P across all levels is _________ KB
 A 1024 B 4096 C 4108 D 1864
GATE CSE 2021 SET-2   Operating System
Question 3 Explanation:
 Question 4
In the context of operating systems, which of the following statements is/are correct with respect to paging?
[MSQ]
 A Paging helps solve the issue of external fragmentation B Page size has no impact on internal fragmentation C Paging incurs memory overheads D Multi-level paging is necessary to support pages of different sizes
GATE CSE 2021 SET-1   Operating System
Question 4 Explanation:
 Question 5
Consider the following page reference string.
1 2 3 4 2 1 5 6 2 1 2 3 7 6 3 2 1 2 3 6
What are the minimum number of frames required to get a single page fault for the above sequence assuming LRU replacement strategy?
 A 7 B 4 C 6 D 5
ISRO CSE 2020   Operating System
Question 5 Explanation:
 Question 6
What is compaction refers to
 A a technique for overcoming internal fragmentation B a paging technique C a technique for overcoming external fragmentation D a technique for compressing the data
ISRO CSE 2020   Operating System
Question 6 Explanation:
 Question 7
Consider a paging system that uses 1-level page table residing in main memory and a TLB for address translation. Each main memory access takes 100 ns and TLB lookup takes 20 ns. Each page transfer to/from the disk takes 5000 ns. Assume that the TLB hit ratio is 95%, page fault rate is 10%. Assume that for 20% of the total page faults, a dirty page has to be written back to disk before the required page is read from disk. TLB update time is negligible. The average memory access time in ns (round off to 1 decimal places) is ___________
 A 725 B 155 C 715 D 125
GATE CSE 2020   Operating System
Question 7 Explanation:
 Question 8
Consider allocation of memory to a new process. Assume that none of the existing holes in the memory will exactly fit the process's memory requirement. Hence, a new hole of smaller size will be created if allocation is made in any of the existing holes. Which one of the following statement is TRUE?
 A The hole created by first fit is always larger than the hole created by next fit. B The hole created by worst fit is always larger than the hole created by first fit. C The hole created by best fit is never larger than the hole created by first fit. D The hole created by next fit is never larger than the hole created by best fit.
GATE CSE 2020   Operating System
Question 8 Explanation:
 Question 9
Assume that in a certain computer, the virtual addresses are 64 bits long and the physical addresses are 48 bits long. The memory is word addressable. The page size is 8kB and the word size is 4 bytes. The Translation Look-aside Buffer (TLB) in the address translation path has 128 valid entries. At most how many distinct virtual addresses can be translated without any TLB miss?
 A $16 \times 2^{10}$ B $256 \times 2^{10}$ C $4 \times 2^{20}$ D $8 \times 2^{20}$
GATE CSE 2019   Operating System
Question 9 Explanation:
 Question 10
The Operating System of a computer may periodically collect all the free memory space to form contiguous block of free space. This is called:
 A Concatenation B Garbage Collection C Collision D Dynamic Memory Allocation
ISRO CSE 2018   Operating System
Question 10 Explanation:

There are 10 questions to complete.