Sequential Circuit


Question 1
Consider a sequential digital circuit consisting of T flip-flops and D flip-flops as shown in the figure. CLKIN is the clock input to the circuit. At the beginning, Q1, Q2 and Q3 have values 0, 1 and 1, respectively.

Which one of the given values of (Q1, Q2, Q3) can NEVER be obtained with this digital circuit?
A
(0, 0, 1)
B
(1, 0, 0)
C
(1, 0, 1)
D
(1, 1, 1)
GATE CSE 2023   Digital Logic
Question 2
Consider a 3-bit counter, designed using T flip-flops, as shown below:

Assuming the initial state of the counter given by PQR as 000, what are the next three states?
A
011,101,000
B
001,010,111
C
011,101,111
D
001,010,000
GATE CSE 2021 SET-1   Digital Logic


Question 3
A new flipflop with inputs X and Y, has the following property
\begin{array}{|c|c|c|c|} \hline \mathbf{X} & \mathbf{Y} & \text { Current state } & \text { Next state } \\ \hline 0 & 0 & Q & 1 \\ 0 & 1 & Q & \bar{Q} \\ 1 & 1 & Q & 0 \\ 1 & 0 & Q & Q \\ \hline \end{array}
Which of the following expresses the next state in terms of X,Y, current state?
A
(\bar{X} \wedge \bar{Q}) \vee(\bar{Y} \wedge Q)
B
(\bar{X} \wedge {Q}) \vee(\bar{Y} \wedge \bar{Q})
C
({X} \wedge \bar{Q}) \vee({Y} \wedge {Q})
D
({X} \wedge \bar{Q}) \vee(\bar{Y} \wedge {Q})
ISRO CSE 2020   Digital Logic
Question 4
Consider the sequential circuit shown in the figure, where both flip-flops used are positive edge-triggered D flip-flops.

The number of states in the state transition diagram of this circuit that have a transition back to the same state on some value of "in" is _____.
A
1
B
2
C
3
D
4
GATE CSE 2018   Digital Logic
Question 5
Advantage of synchronous sequential circuits over asynchronous one is :
A
Lower hardware requirement
B
Better noise immunity
C
Faster operation
D
All of the above
ISRO CSE 2017   Digital Logic


There are 5 questions to complete.

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