An 8-bit unipolar (all analog output values are positive) digital-to-analog converter (DAC) has a full-scale voltage range from 0\; V
to 7.68\:V. If the digital input code is 10010110
(the leftmost bit is \text{MSB}), then the analog output voltage of the DAC (rounded off to one decimal place) is ___________ V.
A 10-bit D/A converter is calibrated over the full range from 0 to 10 V. If the input to
the D/A converter is 13A (in hex), the output (rounded off to three decimal places) is
_________ V.
Given, n=10 V_{FS}=10\, V Input Voltage=(13A)_{16}=(314)_{10} Output Voltage=Resolution X Decimal Equivalent of input V_{o}=\frac{10}{2^{10}-1}\times 314=3.069\, V
Question 4
In an N bit flash ADC, the analog voltage is fed simultaneously to 2^{N}-1 comparators. The output of the comparators is then encoded to a binary format using digital circuits. Assume that the analog voltage source V_{in} (whose output is being converted to digital format) has a source resistance of 75 \Omega as shown in the circuit diagram below and the input capacitance of each comparator is 8 pF.
The input must settle to an accuracy of 1/2 LSB even for a full scale input change for proper conversion. Assume that the time taken by the thermometer to binary encoder is negligible. If the flash ADC has 8 bit resolution, which one of the following alternatives is closest to the maximum sampling rate ?
Consider a four bit D to A converter. The analog value corresponding to digital signals of values 0000 and 0001 are 0 V and 0.0625 V respectively. The analog value (in Volts) corresponding to the digital signal 1111 is ________.
The output of a 3-stage Johnson (twisted ring) counter is fed to a digital-to
analog (D/A) converter as shown in the figure below. Assume all the states
of the counter to be unset initially. The waveform which represents the D/A
converter output v_{o} is
In the following circuit, the comparator output is logic "1" if V_{1} \gt V_{2} and is logic "0" otherwise. The D/A conversion is done as per the relations V_{DAC}=\sum_{n=0}^{3}2^{n-1}b_{n} Volts, where b_{3}
(MSB), b_{2}, b_{1}, b_{0}(LSB) are the counter outputs. The counter starts from the
clear state.
The magnitude of the error between V_{DAC} and V_{in} at steady state in volts is
Magnitude of the error between V_{\mathrm{DAC}} and V_{\text {in }} at steady state =6.5-6.2=0.3 \mathrm{V}
Question 8
In the following circuit, the comparator output is logic "1" if V_{1} \gt V_{2} and is logic "0" otherwise. The D/A conversion is done as per the relations V_{DAC}=\sum_{n=0}^{3}2^{n-1}b_{n} Volts, where b_{3}
(MSB), b_{2}, b_{1}, b_{0}(LSB) are the counter outputs. The counter starts from the
clear state.
The stable reading of the LED displays is