# BJT and FET Basics

 Question 1
An ideal MOS capacitor (p-type semiconductor) is shown in the figure. The MOS capacitor is under strong inversion with $V_G=2V$. The corresponding inversion charge density $Q_{IN}$ is $2.2\mu C/cm^2$. Assume oxide capacitance per unit area as $C_{OX}=1.7\mu F/cm^2$. For $V_G=4V$, the value of $Q_{IN}$ is ______$\mu C/cm^2$ (rounded off to one decimal place).

 A 4.8 B 5.6 C 8.2 D 9.7
GATE EC 2022   Electronic Devices
Question 1 Explanation:
\begin{aligned} Q_{IN}&=-CO_X(V_G-V_T)\\ Q_{IN_1}&=-CO_X(V_{G1}-V_T)\;\;\;...(i)\\ Q_{IN_2}&=-CO_X(V_{G2}-V_T)\;\;\;...(ii)\\ &(ii)-(i)\\ Q_{IN_2}-Q_{IN_1}&=-CO_X(V_{G2}-V_{G1})\\ Q_{IN_2}-(-2.2\mu c/cm^2)&=-1.7\mu c/cm^2(4-2)\\ Q_{IN_2}&=2.2\mu c/cm^2-3.4\mu c/cm^2\\ &=-5.6\mu c/cm^2 \end{aligned}
 Question 2
For the transistor $M_{1}$ in the circuit shown in the figure, $\mu_{n} C_{\text{ox}} = 100\:\mu A/V^{2}$ and $(W/L)=10$, where $\mu_{n}$ is the mobility of electron, $C_{\text{ox}}$ is the oxide capacitance per unit area , W is the width and L is the length.

The channel length modulation coefficient is ignored. If the gate-to-source voltage $V_{\text{GS}}\text{ is } 1\:V$ to keep the transistor at the edge of saturation, then the threshold voltage of the transistor (rounded off to one decimal place) is _______ V.
 A 0.3 B 0.5 C 1.2 D 1.5
GATE EC 2021   Electronic Devices
Question 2 Explanation:
\begin{aligned} I_{D S}&=\frac{\mu_{n} C_{O x}}{2} \times \frac{W}{L}\left(V_{G S}-V_{T}\right)^{2} \\ \text{Given}\qquad V_{G S}&=1 \mathrm{~V} \\ I_{D S}&=\frac{1}{2}\left(1-V_{T}\right)^{2} \end{aligned}

\begin{aligned} V_{D S}=3-20 \times I_{D S} \\ V_{D S}=3-\frac{20}{2}\left(1-V_{T}\right)^{2} \\ V_{D S}=3-10\left(1-V_{T}\right)^{2} \end{aligned}
MOSFET operates in saturation if
\begin{aligned} V_{D S} &\geq V_{G S}-V_{T}\\ \text{So, we take},\qquad \quad V_{D S}&=V_{G S}-V_{T} \\ V_{G S}-V_{T}&=3-10\left(1-V_{T}\right)^{2} \\ 1-V_{T}&=3-10\left(1-V_{T}\right)^{2}\\ \text{Let,}\qquad 1-V_{T} &=x \\ 3-10 x^{2} &=x \\ 10 x^{2}+x-3 x &=0 \\ \text{We get,}\qquad x &=-\frac{1 \pm \sqrt{1+120}}{20}\\ x &=-\frac{1 \pm 11}{20}\\ \therefore \qquad \quad x&=0.5 \text { and }-0.6\\ x&=0.5\\ \Rightarrow \qquad \quad 1-V_{T} & =0.5 \\ \Rightarrow \qquad \quad V_{T} & =0.5 \mathrm{~V} \\ x & =-0.6 \\ \Rightarrow\qquad \quad 1-V_{T} & =-0.6 \\ \Rightarrow\qquad \quad V_{T} & =1.6 \mathrm{~V} \\ \text { But }\qquad \quad V_{G S} & \gt V_{T} \\ \text { or }\qquad \quad V_{T} & \lt V_{G S} \\ \text { i.e., }\qquad \quad V_{T} & \lt 1 \\ \therefore\qquad \quad V_{T} & =0.5 \mathrm{~V} \end{aligned}
 Question 3
For an n-channel silicon $\text{MOSFET}$ with $10\:nm$ gate oxide thickness, the substrate sensitivity $\left ( \partial V_{T}/\partial \left | V_{BS} \right | \right )$ is found to be $50\:mV/V$ at a substrate voltage $\left | V_{BS} \right |=2V$, where $V_{T}$ is the threshold voltage of the $\text{MOSFET}$. Assume that, $\left | V_{BS} \right | \gg 2\Phi _{B}$, where $q\Phi _{B}$ is the separation between the Fermi energy level $E_{F}$ and the intrinsic level $E_{i}$ in the bulk. Parameters given are
Electron charge $(q) = 1.6 \times 101^{-19}\:C$
Vacuum permittivity $(\varepsilon _{0}) = 8.85 \times 10^{-12}\: F/m$
Relative permittivity of silicon $(\varepsilon _{Si}) = 12$
Relative permittivity of oxide $(\varepsilon _{ox}) = 4$
The doping concentration of the substrate is
 A $7.37\times 10^{15}\:cm^{-3}$ B $4.37\times 10^{15}\:cm^{-3}$ C $2.37\times 10^{15}\:cm^{-3}$ D $9.37\times 10^{15}\:cm^{-3}$
GATE EC 2021   Electronic Devices
Question 3 Explanation:
Given, N -channel MOSFET
\begin{aligned} t_{o x}&=10 \mathrm{~nm}=10 \times 10^{-7} \mathrm{~cm} & \\ \frac{\partial V_{T}}{\partial\left|V_{B S}\right|}&=50 \mathrm{mV} / \mathrm{V}, & \left|V_{B S}\right|=2 \mathrm{~V} \\ \qquad q&=1.6 \times 10^{-19} \mathrm{C} & \left|V_{B S}\right|>>2 \phi_{B} \end{aligned}

\begin{aligned} \epsilon_{o} &=8.85 \times 10^{-14} \mathrm{~F} / \mathrm{cm} \\ \epsilon_{r_{\mathrm{Si}}} &=12 \\ \epsilon_{r_{O x}} &=4 \end{aligned}
Threshold voltage, including body effect,
$V_{T}=\phi_{m s}+\frac{\sqrt{2 \epsilon_{s i} q N_{A}\left(2 \phi_{B}-V_{B S}\right)}}{C_{o x}}+2 \phi_{B}$
\begin{aligned} \text{In question, we need, } \left|V_{B S}\right|&=\left|V_{S B}\right| \\ \therefore \qquad \qquad V_{T}&=\phi_{m s}+\frac{\sqrt{2 \epsilon_{s i} q N_{A}\left(2 \phi_{B}+V_{S B}\right)}}{C_{o x}}+2 \phi_{B}\\ \Rightarrow \qquad \qquad V_{T}&=\phi_{m s}+\frac{\sqrt{2 \epsilon_{s i} q N_{A}\left(2 \phi_{B}+\left|V_{S B}\right|\right)}}{C_{O x}}+2 \phi_{B}\\ \therefore \qquad\qquad \frac{\partial V_{T}}{\partial\left|V_{B S}\right|}&=0+\frac{\sqrt{2 \epsilon_{s i} q N_{A}}}{C_{O x}} \cdot \frac{1}{2 \sqrt{2 \phi_{B}+\left|V_{S B}\right|}}+0\\ \Rightarrow \qquad \qquad 50 \times 10^{-3}&=\frac{\sqrt{2 \times 8.85 \times 10^{-14} \times 12 \times 1.6 \times 10^{-19} \mathrm{~N}_{A}}}{\epsilon_{\alpha x} / t_{0 x}} \cdot \frac{1}{2 \sqrt{\left|V_{S B}\right|}}\\ \left(\frac{50 \times 10^{-3} \times 4 \times 8.85 \times 10^{-14}}{10 \times 10^{-7}}\right)^{2}&=\frac{2 \times 8.85 \times 10^{-14} \times 12 \times 1.6 \times 10^{-19}}{4 \times 2}\\ &\left[\because\left|V_{S B}\right| \gt \gt 2 \phi_{B}\right]\\ \Rightarrow \qquad \qquad N_{A}&=7.375 \times 10^{15} \mathrm{~cm}^{-3} \end{aligned}
 Question 4
In the circuit shown in the figure, the transistors $M_{1}$ and $M_{2}$ are operating in saturation. The channel length modulation coefficients of both the transistors are non-zero. The transconductance of the $\text{MOSFETs} M_{1}$ and $M_{2}$ are $g_{m1}$ and $g_{m2}$ , respectively, and the internal resistance of the $\text{MOSFETs} M_{1}$ and $M_{2}$ are $r_{01}$ and $r_{02}$ , respectively.

Ignoring the body effect, the ac small signal voltage gain $\left ( \partial V_{out}/\partial V_{in} \right )$ of the circuit is
 A $-g_{m2}\left ( r_{01}\left | \right |r_{02}\right )$ B $-g_{m2}\left ( \frac{1}{g_{m1}}\left | \right |r_{02} \right )$ C $-g_{m1}\left ( \frac{1}{g_{m2}}\left | \right |r_{01}\left | \right |r_{02} \right )$ D $-g_{m2}\left ( \frac{1}{g_{m1}}\left | \right |r_{01}\left | \right |r_{02} \right )$
GATE EC 2021   Electronic Devices
Question 4 Explanation:
MOSFET $M_2$ acts as common source amplifier.

Drain to gate connected MOSFET $M_1$ acts as load.

For given circuit, AC equivalent is as shown.

Replace $M_2$ with small signal model

\begin{aligned} \frac{V_{\text {out }}}{V_{\text {in }}} &=\frac{-g_{m 2} V_{g s}\left(r_{\infty} \| R_{\text {eq }}\right)}{V_{g s}} \\ A_{V} &=-g_{m 2}\left( \frac{1}{g_{m 1}}|| r_{o1} || r_{o 2} \right) \end{aligned}
 Question 5
The base of an npn BJT T1 has a linear doping profile $N_B(x)$ as shown below. The base of another npn BJT T2 has a uniform doping $N_B$ of $10^{17} cm^{-3}$. All other parameters are identical for both the devices. Assuming that the hole density profile is the same as that of doping, the common-emitter current gain of T2 is
 A approximately 2.0 times that of T1 B approximately 0.3 times that of T1 C approximately 2.5 times that of T1 D approximately 0.7 times that of T1
GATE EC 2020   Electronic Devices
Question 5 Explanation:

As per GATE official answer key MTA (Marks to ALL)
$\frac{\beta _{1}}{\beta _{2}}=\frac{\int_{0}^{W}N_{A_{2}}(x)dx}{\int_{0}^{W}N_{A_{1}}(x)dx}=\frac{W\times 10^{17}}{\frac{1}{2}\times W\times (10^{17}-10^{14})}=\frac{2\times 10^{17}}{10^{17}+10^{14}}\simeq 2$
 Question 6
The band diagram of a p-type semiconductor with a band-gap of 1 eV is shown. Using this semiconductor, a MOS capacitor having $V_{TH}$ of $-0.16 V, C'_{ox}$ of 100 $nF/cm^2$ and a metal work function of 3.87 eV is fabricated. There is no charge within the oxide. If the voltage across the capacitor is $V_{TH}$. the magnitude of depletion charge per unit area (in $C/cm^2$) is
 A $1.7 \times 10^{-8}$ B $0.52 \times 10^{-8}$ C $1.41 \times 10^{-8}$ D $0.93 \times 10^{-8}$
GATE EC 2020   Electronic Devices
Question 6 Explanation:
MOS capacitance

\begin{aligned}\phi_{m}&=3.87,\phi _{B}=4.8,\phi _{ms}=-0.93\\V_{T}&=\phi _{ms}-\frac{{Q}'_{ox} }{{C}_{ox}}-\frac{{Q}'_{d}}{{C}_{ox}}+2\phi_{F_{p}}\\ \phi _{F_{p}}&=E_{i}-E_{F}=0.5-0.2=0.3\\ -0.16&=-0.93-0-\frac{{Q}'_{d}}{C_{ox}}+2\times 0.3 \\ \frac{{Q}'_{d}}{C_{ox}}&=0.6+0.16-0.93=-0.17\\ Q_{b}&=-0.17\times C_{ox}\\ &=-0.17\times 100\times 10^{-9} \\ & =-1.7\times 10^{-8}C/cm^{2}\end{aligned}
 Question 7
Consider a long-channel MOSFET with a channel length 1 $\mu m$ and width 10 $\mu m$. The device parameters are acceptor concentration $N_A=5 \times 10^{16}cm^{-3}$, electron mobility $\mu_n=800cm^2/V-s$, oxide capacitance/area $C_{ox}=3.45 \times 10^{-7}F/cm^{2}$, threshold voltage $V_T=0.7V$. The drain saturation current ($I_{Dsat}$) for a gate voltage of 5 V is _____mA(rounded off to two decimal places).
$[\varepsilon _0=8.854 \times 10^{-14}F/cm,\varepsilon _{Si}=11.9]$
 A 12.45 B 18.36 C 25.52 D 36.48
GATE EC 2019   Electronic Devices
Question 7 Explanation:
\begin{aligned} I_{D(\text { sat })} &=\frac{1}{2} \mu_{n} C_{\text {ox }} \frac{W}{L}\left(V_{G S}-V_{T}\right)^{2} \\ &=\frac{1}{2} \times 800 \times 3.45 \times 10^{-7} \times \frac{10}{1}(5-0.7)^{2} \mathrm{A} \\ &=25.5162 \mathrm{mA} \simeq 25.52 \mathrm{mA} \end{aligned}
 Question 8
The figure shows the high-frequency C-V curve of a MOS capacitor (at T = 300 K) with $\Phi _{ms}=0V$ and no oxide charges. The flat-band, inversion, and accumulation conditions are represented, respectively, by the points
 A P, Q, R B Q, R, P C R, P, Q D Q, P, R
GATE EC 2019   Electronic Devices
Question 8 Explanation:
Since $\phi_{ms}= 0$, the MOS-capacitor is ideal.
Point P Represents accumulation
Point Q Represents flat band
Point R Represents Inversion
 Question 9
Two n-channel MOSFETs, T1 and T2, are identical in all respects except that the width of T2 is double that of T1. Both the transistors are biased in the saturation region of operation, but the gate overdrive voltage ($V_{GS}-V_{TH}$) of T2 is double that of T1, where $V_{GS} \; and \; V_{TH}$ are the gate-to-source voltage and threshold voltage of the transistors, respectively. If the drain current and transconductance of T1 are $I_{D1} \; and \; g_{m1}$ respectively, the corresponding values of these two parameters for T2 are
 A $8I_{D1} \; and \; 2g_{m1}$ B $8I_{D1}\; and \; 4g_{m1}$ C $4I_{D1} \; and \; 4g_{m1}$ D $4I_{D1} \; and \; 2g_{m1}$
GATE EC 2017-SET-2   Electronic Devices
Question 9 Explanation:
\begin{aligned} W_{2} &=2 \mathrm{W} \\ V_{\text {GS2 }}-V_{T 2} &=\left(V_{G S 1}-V_{T 1}\right) \\ \frac{I_{D 2}}{I_{D 1}} &=\frac{W_{2}}{W_{1}} \times\left(\frac{V_{G S 2}-V_{T 2}}{V_{G S 1}-V_{T 1}}\right)^{2} \\ &=2 \times 4=8 \\ I_{D 2} &=8 I_{D 1} \\ \frac{g_{m 2}}{g_{m 1}} &=\frac{W_{2}}{W_{1}} \times \frac{V_{G S 2}-V_{T 2}}{V_{G S 1}-V_{T 1}}=2 \times 2=4 \\ g_{m 2} &=4 g_{m 1} \end{aligned}
 Question 10
A MOS capacitor is fabricated on p-type Si (silicon) where the metal work function is 4.1 eV and electron affinity of Si is 4.0 eV. $E_{C}-F_{F}$=0.9 eV, where $E_{C}$ and $E_{F}$ are the conduction band minimum and the Fermi energy levels of Si, respectively. Oxide $\in_{r}=3.9,\in_{o}=8.85 \times 10^{-14}$ F/cm, oxide thickness $t_{ox} = 0.1 \mu m$ and electronic charge $q =1.6 \times 10^{-19} C$. If the measured flat band voltage of the capacitor is -1V, then the magnitude of the fixed charge at the oxide-semiconductor interface, in $nC/cm^{2}$, is __________.
 A 5.5 B 6.2 C 6.9 D 7.4
GATE EC 2017-SET-2   Electronic Devices
Question 10 Explanation:

\begin{aligned} \theta_{0} &=4.1 \mathrm{eV} \\ e_{K} &=4 \mathrm{eV} \\ E_{C}-E_{F P} &=0.9 \mathrm{eV} \\ e \phi_{s} &=e x+0.9=4.9 \mathrm{eV} \\ \phi_{m} &=4.1 \mathrm{V}, \quad \phi_{s}=4.9 \mathrm{V} \\ \phi_{m s} &=\phi_{m}-\phi_{s}=4.1-4.9=-0.8 \mathrm{v} \\ C_{o x} &=\frac{\epsilon_{O x}}{t_{o x}}=\frac{3.9 \times 8.85 \times 10^{-14}}{0.1 \times 10^{-4}}\\ &=34.515 \times 10^{-9} \mathrm{F} / \mathrm{cm}^{2} \\ V_{F B} &=\phi_{\text {rns }}-\frac{\phi_{o x}^{\prime}}{C_{O x}} \\ \frac{\phi_{O x}^{\prime}}{C_{O x}} &=-0.8+1=0.2 \mathrm{V} \\ \phi_{o x}^{\prime} &=0.2 \times C_{0 x} \\ &=0.2 \times 34.515 \times 10^{-9} \mathrm{C} / \mathrm{cm}^{2} \\ &=6.903 \mathrm{nC} / \mathrm{cm}^{2}\\ \end{aligned}
There are 10 questions to complete.