BJT and FET Basics

Question 1
The base of an npn BJT T1 has a linear doping profile N_B(x) as shown below. The base of another npn BJT T2 has a uniform doping N_B of 10^{17} cm^{-3}. All other parameters are identical for both the devices. Assuming that the hole density profile is the same as that of doping, the common-emitter current gain of T2 is
A
approximately 2.0 times that of T1
B
approximately 0.3 times that of T1
C
approximately 2.5 times that of T1
D
approximately 0.7 times that of T1
GATE EC 2020   Electronic Devices
Question 1 Explanation: 

As per GATE official answer key MTA (Marks to ALL)
\frac{\beta _{1}}{\beta _{2}}=\frac{\int_{0}^{W}N_{A_{2}}(x)dx}{\int_{0}^{W}N_{A_{1}}(x)dx}=\frac{W\times 10^{17}}{\frac{1}{2}\times W\times (10^{17}-10^{14})}=\frac{2\times 10^{17}}{10^{17}+10^{14}}\simeq 2
Question 2
The band diagram of a p-type semiconductor with a band-gap of 1 eV is shown. Using this semiconductor, a MOS capacitor having V_{TH} of -0.16 V, C'_{ox} of 100 nF/cm^2 and a metal work function of 3.87 eV is fabricated. There is no charge within the oxide. If the voltage across the capacitor is V_{TH}. the magnitude of depletion charge per unit area (in C/cm^2) is
A
1.7 \times 10^{-8}
B
0.52 \times 10^{-8}
C
1.41 \times 10^{-8}
D
0.93 \times 10^{-8}
GATE EC 2020   Electronic Devices
Question 2 Explanation: 
MOS capacitance

\begin{aligned}\phi_{m}&=3.87,\phi _{B}=4.8,\phi _{ms}=-0.93\\V_{T}&=\phi _{ms}-\frac{{Q}'_{ox} }{{C}_{ox}}-\frac{{Q}'_{d}}{{C}_{ox}}+2\phi_{F_{p}}\\ \phi _{F_{p}}&=E_{i}-E_{F}=0.5-0.2=0.3\\ -0.16&=-0.93-0-\frac{{Q}'_{d}}{C_{ox}}+2\times 0.3 \\ \frac{{Q}'_{d}}{C_{ox}}&=0.6+0.16-0.93=-0.17\\ Q_{b}&=-0.17\times C_{ox}\\ &=-0.17\times 100\times 10^{-9} \\ & =-1.7\times 10^{-8}C/cm^{2}\end{aligned}
Question 3
Consider a long-channel MOSFET with a channel length 1 \mu m and width 10 \mu m. The device parameters are acceptor concentration N_A=5 \times 10^{16}cm^{-3}, electron mobility \mu_n=800cm^2/V-s, oxide capacitance/area C_{ox}=3.45 \times 10^{-7}F/cm^{2}, threshold voltage V_T=0.7V. The drain saturation current (I_{Dsat}) for a gate voltage of 5 V is _____mA(rounded off to two decimal places).
[\varepsilon _0=8.854 \times 10^{-14}F/cm,\varepsilon _{Si}=11.9]
A
12.45
B
18.36
C
25.52
D
36.48
GATE EC 2019   Electronic Devices
Question 3 Explanation: 
\begin{aligned} I_{D(\text { sat })} &=\frac{1}{2} \mu_{n} C_{\text {ox }} \frac{W}{L}\left(V_{G S}-V_{T}\right)^{2} \\ &=\frac{1}{2} \times 800 \times 3.45 \times 10^{-7} \times \frac{10}{1}(5-0.7)^{2} \mathrm{A} \\ &=25.5162 \mathrm{mA} \simeq 25.52 \mathrm{mA} \end{aligned}
Question 4
The figure shows the high-frequency C-V curve of a MOS capacitor (at T = 300 K) with \Phi _{ms}=0V and no oxide charges. The flat-band, inversion, and accumulation conditions are represented, respectively, by the points
A
P, Q, R
B
Q, R, P
C
R, P, Q
D
Q, P, R
GATE EC 2019   Electronic Devices
Question 4 Explanation: 
Since \phi_{ms}= 0, the MOS-capacitor is ideal.
Point P Represents accumulation
Point Q Represents flat band
Point R Represents Inversion
Question 5
Two n-channel MOSFETs, T1 and T2, are identical in all respects except that the width of T2 is double that of T1. Both the transistors are biased in the saturation region of operation, but the gate overdrive voltage (V_{GS}-V_{TH}) of T2 is double that of T1, where V_{GS} \; and \; V_{TH} are the gate-to-source voltage and threshold voltage of the transistors, respectively. If the drain current and transconductance of T1 are I_{D1} \; and \; g_{m1} respectively, the corresponding values of these two parameters for T2 are
A
8I_{D1} \; and \; 2g_{m1}
B
8I_{D1}\; and \; 4g_{m1}
C
4I_{D1} \; and \; 4g_{m1}
D
4I_{D1} \; and \; 2g_{m1}
GATE EC 2017-SET-2   Electronic Devices
Question 5 Explanation: 
\begin{aligned} W_{2} &=2 \mathrm{W} \\ V_{\text {GS2 }}-V_{T 2} &=\left(V_{G S 1}-V_{T 1}\right) \\ \frac{I_{D 2}}{I_{D 1}} &=\frac{W_{2}}{W_{1}} \times\left(\frac{V_{G S 2}-V_{T 2}}{V_{G S 1}-V_{T 1}}\right)^{2} \\ &=2 \times 4=8 \\ I_{D 2} &=8 I_{D 1} \\ \frac{g_{m 2}}{g_{m 1}} &=\frac{W_{2}}{W_{1}} \times \frac{V_{G S 2}-V_{T 2}}{V_{G S 1}-V_{T 1}}=2 \times 2=4 \\ g_{m 2} &=4 g_{m 1} \end{aligned}
Question 6
A MOS capacitor is fabricated on p-type Si (silicon) where the metal work function is 4.1 eV and electron affinity of Si is 4.0 eV. E_{C}-F_{F}=0.9 eV, where E_{C} and E_{F} are the conduction band minimum and the Fermi energy levels of Si, respectively. Oxide \in_{r}=3.9,\in_{o}=8.85 \times 10^{-14} F/cm, oxide thickness t_{ox} = 0.1 \mu m and electronic charge q =1.6 \times 10^{-19} C. If the measured flat band voltage of the capacitor is -1V, then the magnitude of the fixed charge at the oxide-semiconductor interface, in nC/cm^{2}, is __________.
A
5.5
B
6.2
C
6.9
D
7.4
GATE EC 2017-SET-2   Electronic Devices
Question 6 Explanation: 


\begin{aligned} \theta_{0} &=4.1 \mathrm{eV} \\ e_{K} &=4 \mathrm{eV} \\ E_{C}-E_{F P} &=0.9 \mathrm{eV} \\ e \phi_{s} &=e x+0.9=4.9 \mathrm{eV} \\ \phi_{m} &=4.1 \mathrm{V}, \quad \phi_{s}=4.9 \mathrm{V} \\ \phi_{m s} &=\phi_{m}-\phi_{s}=4.1-4.9=-0.8 \mathrm{v} \\ C_{o x} &=\frac{\epsilon_{O x}}{t_{o x}}=\frac{3.9 \times 8.85 \times 10^{-14}}{0.1 \times 10^{-4}}\\ &=34.515 \times 10^{-9} \mathrm{F} / \mathrm{cm}^{2} \\ V_{F B} &=\phi_{\text {rns }}-\frac{\phi_{o x}^{\prime}}{C_{O x}} \\ \frac{\phi_{O x}^{\prime}}{C_{O x}} &=-0.8+1=0.2 \mathrm{V} \\ \phi_{o x}^{\prime} &=0.2 \times C_{0 x} \\ &=0.2 \times 34.515 \times 10^{-9} \mathrm{C} / \mathrm{cm}^{2} \\ &=6.903 \mathrm{nC} / \mathrm{cm}^{2}\\ \end{aligned}
Question 7
An npn bipolar junction transistor (BJT) is operating in the active region. If the reverse bias across the base - collector junction is increased, then
A
the effective base width increases and common - emitter current gain increases
B
the effective base width increases and common - emitter current gain decreases
C
the effective base width decreases and common - emitter current gain increases
D
the effective base width decreases and common - emitter current gain decreases
GATE EC 2017-SET-2   Electronic Devices
Question 7 Explanation: 
When a BJT is in active region, as the reverse bias voltage across collector-base junction increased, the width of depletion region increases, which results in decrease of effective base width. This decrease in effective base width reduces the recombinations in base region, hence, common-emitter current gain will increase.
Question 8
Consider an n-channel MOSFET having width W, length L, electron mobility in the channel \mu_{n} and oxide capacitance per unit area C_{ox}. If gate-to-source voltage V_{GS}=0.7V, drain-tosource voltage V_{DS}=0.1V,(\mu_{n}C_{ox})=100\mu A/V^{2},threshold voltage V_{TH}=0.3 V and (W/L)=50,then the transconductance g_{m}(in mA/V) is ___________.
A
0.3
B
0.5
C
0.6
D
0.7
GATE EC 2017-SET-2   Electronic Devices
Question 8 Explanation: 
Given that,
\begin{aligned} V_{G S} &=0.7 \mathrm{V}, V_{T H}=0.3 \mathrm{V}, V_{D S}=0.1 \mathrm{V} \\ V_{G S}-V_{T H} &=0.4>V_{D S} \end{aligned}
\Rightarrow MOSFET is in linear region
In linear region,
I_{D}=K_{n}\left[2\left(V_{G S}-V_{T H}\right) V_{O S}-V_{D S}^{2}\right]
Transconductance
\begin{aligned} g_{m}&=\frac{\partial I_{D}}{\partial V_{G S}}=2 K_{n} V_{D S} \\ K_{n}&=\frac{K_{n}}{2}\left(\frac{W}{L}\right)=\frac{\mu_{n} C_{O x}}{2}\left(\frac{W}{L}\right)\\ \text{So,}\quad g_{m} &=2 K_{n} V_{D S}=\mu_{n} C_{O x}\left(\frac{W}{L}\right) V_{D S} \\ &=100 \times 50 \times 0.1 \mu \mathrm{A} / \mathrm{V} \\ &=0.5 \mathrm{mA} N \end{aligned}
Question 9
For a narrow base PNP BJT, the excess minority carrier concentration (\Delta n_{E} for emitter, \Delta p_{E0} for base. \Delta n_{c} for collector) normalized to equilibrium minority carrier concentration ( n_{E0} for emmiter, p_{B0} for base, n_{C0} for collector) in the quasi-neutral emitter, base and collector regions are shown below. Which one of the following biasing modes is the transistor operating in ?
A
Forward active
B
Saturation
C
Inverse active
D
Cutoff
GATE EC 2017-SET-1   Electronic Devices
Question 9 Explanation: 
Emitter-base junction (J_{E}) is in RB
Collector-base junction (J_{C}) is in FB
Hence, inverse active mode.
Question 10
Figures I and II show two MOS capacitors of unit area. The capacitor in Figure I has insulator materials X (of thickness t_1 = 1nm and dielectric constant \varepsilon _{1} = 4) and Y (of thickness t_2 = 3 nm and dielectric constant \varepsilon _{2} = 20). The capacitor in Figure II has only insulator material X of thickness t_{Eq}. If the capacitors are of equal capacitance, then the value of t_{Eq} (in nm) is __________
A
1.6
B
2.4
C
3.2
D
4.6
GATE EC 2016-SET-3   Electronic Devices
Question 10 Explanation: 
From the figure I.
Both the capacitors C_{1} and C_{2} are in series
Total Capacitance, C=\frac{C_{1} C_{2}}{C_{1}+C_{2}}
\begin{aligned} C=& \frac{A e_{1}}{A_{1}} \cdot \frac{A \varepsilon_{2}}{t_{2}} \\ =& \frac{A x_{1}+A \varepsilon_{2}}{t_{1}}+\frac{A \times 20}{12} \\ =& \frac{10^{-9} \cdot \frac{A \times 10^{-9}}{4 \times 4}+\frac{A \times 20}{3 \times 10^{-9}}}{10^{-9}} \\ C=& 2.5 \times 10^{9} \times A \end{aligned}
From figure II
C=\frac{\varepsilon A}{t_{\theta q}}
since both capacitors must be equal in figures I and II
\begin{array}{r} 2.5 \times 10^{9} \times A=\frac{A \times 4}{t_{e q}} \\ t_{e q}=1.6 \mathrm{nm} \end{array}
There are 10 questions to complete.
Like this FREE website? Please share it among all your friends and join the campaign of FREE Education to ALL.