# Diodes Applications

 Question 1
In the circuit shown below, all the components are ideal and the input voltage is sinusoidal. The magnitude of the steady-state output $V_0$ (rounded off to two decimal places) is _________ V. A 325.2 B 650.4 C 125.45 D 752.36
GATE EC 2020   Analog Circuits
Question 1 Explanation:
Voltage Doubles, $V_{o}=2\: V_{m}=2\times 230\sqrt{2}\cong 650.4V$
 Question 2
In the circuit shown, $V_s$ is a 10 V square wave of period, T=4 ms with R= 500$\Omega$ and C = 10 $\mu F$. The capacitor is initially uncharged at t=0, and the diode is assumed to be ideal. The voltage across the capacitor ($V_c$) at 3 ms is equal to ____ volts (rounded off to one decimal place). A 2.8 B 3.3 C 4.6 D 5.4
GATE EC 2019   Analog Circuits
Question 2 Explanation: \begin{aligned} \tau &=R C=500 \times 10 \times 10-6=5 \mathrm{m}_{8} \\ 0 \lt t \lt \frac{t}{2} \; :\; \; v_{\mathrm{cap}} &=v_{f}+\left(v_{i}-v_{f}\right) e^{-t / \tau} \\ &=10+(0-10) e^{-t / \mathrm{Rc}}\\ \text{At }t&=2 \mathrm{msec,} \\ v_{\mathrm{cap}}&=10-10 e^{\frac{-2 \times 10^{-3}}{5 \times 10^{-3}}}\\ &=3.296 \mathrm{V} \simeq 3.3 \mathrm{V} \end{aligned}
For $2 \mathrm{ms} \lt t \lt 4 \mathrm{ms},$ diode is OFF and Capacitor
has no path to discharge. Hence, at t=3 ms $V_{\text {cap }}=3.3 \mathrm{V}$
 Question 3
In the circuit shown, the breakdown voltage and the maximum current of the Zener diode are 20 V and 60 mA, respectively. The values of $R_1 \; and \; R_L$ are $200\Omega \; and \; 1k\Omega$, respectively. What is the range of $V_i$ that will maintain the Zener diode in the 'on' state? A 22 V to 34 V B 24 V to 36 V C 18 V to 24 V D 20 V to 28 V
GATE EC 2019   Analog Circuits
Question 3 Explanation: \begin{aligned} V_{z} &=20 \mathrm{V} \\ I_{z \max } &=60 \mathrm{mA} \end{aligned}
Set zener diode be OFF
$V_{o}=\frac{V_{i} \times 1}{0.2+1}=\frac{V_{i}}{1.2}$
Zener diode can become ON i.e. it goes into
breakdown, when
\begin{aligned} \frac{V_{i}}{1.2} & \gt 20 \mathrm{V} \\ V_{i} & \gt 24 \mathrm{V} \end{aligned}
When Zener diode is in breakdown region,
$\begin{array}{l} I_{1}=\frac{V_{i}-20}{0.2 \mathrm{k} \Omega}=\frac{V_{i}-20}{0.2} \mathrm{mA}\\ I_{L}=\frac{V_{0}}{R_{L}}=\frac{20}{1 \mathrm{k} \Omega}=20 \mathrm{mA} \\ I_{z}=I_{1}-I_{L}=\frac{V_{i}-20}{0.2}-20 \end{array}$
For safe operation, $I_{z} \leq I_{z \max }$
$\frac{V_{i}-20}{0.2}-20 \leq 60$
$\Rightarrow V_{i} \leq 36 \mathrm{V}$
Hence, $24 \lt V_{i} \lt 36 V$
 Question 4
In thecircuit shown, $V_s$ is a square wave of period T with maximum and minimum values of 8 V and -10 V, respectively. Assume that the diode is ideal and $R_1=R_2=50\Omega$. The average value of $V_L$ is____ volts (rounded off to 1 decimal place). A -3 B -3.8 C -2.1 D -2.8
GATE EC 2019   Analog Circuits
Question 4 Explanation:
When $V_{s}=8 \mathrm{V} \Rightarrow$diode is in reverse bias $V_{L}=\frac{8 \times 50}{50+50}=4 \mathrm{V}$
If $V_{s}=-10 \mathrm{V},$ diode is in forward bias Average value of $V_{L}=\frac{\text { Area }}{\text { Time period }}$
$=\frac{4 \times 0.5 T+(-10) \times 0.5 T}{T}=-3 V$
 Question 5
A DC current of 26$\mu A$ flows through the circuit shown. The diode in the circuit is forward biased and it has an ideality factor of one. At the quiescent point, the diode has a junction capacitance of 0.5 nF . Its neutral region resistances can be neglected. Assume that the room temperature thermal equivalent voltage is 26 mV. For $\omega =2 \times 10^{6} \; rad/s$, the amplitude of the small-signal component of diode current (in $\mu A$, correct to one decimal place) is _______.
 A 6.4 B 2.4 C 8.7 D 5
GATE EC 2018   Analog Circuits
Question 5 Explanation:
The small-signal equivalent model of the given circuit can be drawn as shown below. \begin{aligned} \text{Given that, }\omega&=2 \times 10^{6} \mathrm{rad} / \mathrm{sec} \\ C_{j} &=0.5 \mathrm{nF} \\ I_{\mathrm{DC}} &=26 \mu \mathrm{A} \\ V_{T} &=26 \mathrm{mV} \\ \eta &=1\\ \mathrm{So} \quad r_{d} &=\frac{\eta V_{T}}{I_{\mathrm{DC}}}=\frac{26 \mathrm{mV}}{26 \mu \mathrm{A}}=1 \mathrm{k} \Omega \\ \frac{1}{\omega C_{j}} &=\frac{1}{2 \times 10^{6} \times 0.5 \times 10^{-9}} \Omega=1 \mathrm{k} \Omega \end{aligned}
So, total impedance of the circuit will be,
\begin{aligned} Z &=\left(r_{d} \| \frac{1}{j \omega C_{j}}\right)+100 \Omega \\\left(r_{d} \| \frac{1}{j \omega C_{j}}\right) &=\frac{(1000)(-j 1000)}{1000-j 1000} \Omega \\ &=\frac{-j(1+j)}{2} \mathrm{k} \Omega \\ &=\frac{1}{2}(1-j) \mathrm{k} \Omega=(500-j 500) \Omega \\ \therefore \quad Z &=600-j 500 \Omega \\|Z| &=100 \sqrt{36+25}=100 \sqrt{61} \Omega \\ I_{m} &=\frac{V_{m}}{|Z|} \\ &=\frac{5 \mathrm{mV}}{100 \sqrt{61} \Omega}=\frac{50}{\sqrt{61}} \mu \mathrm{A}=6.40 \mu \mathrm{A} \end{aligned}
 Question 6
The circuit shown in the figure is used to provide regulated voltage (5 V) across the 1k$\Omega$ resistor. Assume that the Zener diode has a constant reverse breakdown voltage for a current range, starting from a minimum required Zener current, $I_{Z_{min}} = 2 mA$ to its maximum allowable current. The input voltage $V_{I}$ may vary by 5% from its nominal value of 6 V. The resistance of the diode in the breakdown region is negligible. The value of R and the minimum required power dissipation rating of the diode, respectively, are
 A 186 $\Omega$ and 10 mW B 100 $\Omega$ and 40 mW C 100 $\Omega$ and 10 mW D 186 $\Omega$ and 40 mW
GATE EC 2018   Analog Circuits
Question 6 Explanation:
\begin{aligned} V_{I} &=6 \mathrm{V} \pm 5 \%=6 \mathrm{V} \pm 0.3 \mathrm{V} \\ &=5.7 \mathrm{V} \text { to } 6.3 \mathrm{V}\\ I_{L} &=\frac{5 \mathrm{V}}{1 \mathrm{k} \Omega}=5 \mathrm{m} \mathrm{A} \\ I_{\mathrm{s}(\mathrm{min})} &=I_{L}+I_{Z_{\mathrm{Tmin}}}=5 \mathrm{m} \mathrm{A}+2 \mathrm{m} \mathrm{A} \\ &=7 \mathrm{m} \mathrm{A} \\ I_{s} &=\frac{V_{I}-V_{z}}{R} \\ I_{\mathrm{s}(\min )} &=\frac{V_{I(\min )}-V_{z}}{R}=7 \mathrm{m} \mathrm{A} \\ \text{So,}\quad R &=\frac{5.7-5}{7} \mathrm{k} \Omega=\frac{700}{7} \Omega=100 \Omega\\ \text{When},\quad R=100 \Omega \\ I_{s(\max )} &=\frac{6.3-5}{100} \mathrm{A}=13 \mathrm{mA} \\ I_{z(\max )} &=I_{s(\max )}-I_{L}=13 \mathrm{mA}-5 \mathrm{mA} \\ &=8 \mathrm{mA} \\ P_{z(\min )} &=V_{z} I_{z(\max )}=(5 \times 8) \mathrm{mW}=40 \mathrm{mW} \end{aligned}
 Question 7
In the figure, D1 is a real silicon pn junction diode with a drop of 0.7V under forward bias condition and D2 is a zener diode with breakdown voltage of -6.8 V. The input $V_{in}(t)$ is a periodic square wave of period T, whose one period is shown in the figure. Assuming 10$\tau \lt \lt T$, where $\tau$ is the time constant of the circuit, the maximum and minimum values of the output waveform are respectively,
 A 7.5 V and -20.5V B 6.1 V and -21.9V C 7.5 V and -21.9V D 6.1 V and -22.6V
GATE EC 2017-SET-2   Analog Circuits
Question 7 Explanation:
Its a negative clamper with $V_{\text {ref }}=6.8 \mathrm{V}$
In steady state $V_{\text {cap }}=14-0.7-6.8=6.5 \mathrm{V}$
\begin{aligned} \Rightarrow \quad V_{\text {omax }} &=V_{\text {in } \max }-V_{\text {cap }}=14-6.5 =7.5\mathrm{V} \\ V_{\text {omin }} &=V_{\text {in in }}-V_{\text {cap }}=-14-6.5 =-20.5 \mathrm{V} \end{aligned}
 Question 8
The output $V_{0}$ of the diode circuit shown in the figure is connected to an averaging DC voltmeter. The reading on the DC voltmeter in Volts, neglecting the voltage drop across the diode, is ____________. A 2.84 B 3.18 C 4.55 D 1.62
GATE EC 2017-SET-2   Analog Circuits
Question 8 Explanation:
The given circuit is a halfwave rectifier.
Voltmeter reads the average value of $V_{o}$
Average value of $V_{o}=\frac{V_{m}}{\pi}$
$V_{m}=$ peak value of the applied sine wave $=10 \mathrm{V}$
So, Reading of meter $=\frac{10}{\pi}V=3.183\mathrm{V}$
 Question 9
The I-V characteristics of the zener diodes D1 and D2 are shown in Figure I. These diodes are used in the circuit given in Figure II. If the supply voltage is varied from 0 to 100 V, then breakdown occurs in A D1 only B D2 only C both D1and D2 D none of D1 and D2
GATE EC 2016-SET-3   Analog Circuits
 Question 10
The diodes D1 and D2 in the figure are ideal and the capacitors are identical. The product RC is very large compared to the time period of the ac voltage. Assuming that the diodes do not breakdown in the reverse bias, the output voltage $V_{0}$ (in volt) at the steady state is __________ A 0 B 1 C 2 D 3
GATE EC 2016-SET-3   Analog Circuits
Question 10 Explanation:
During first positive quarter cycle both diodes D1 and D2 conduct and at $t=\frac{T}{4}$ both will be OFF. Both the capacitors will charge to $10 \mathrm{V}$ as shown is above figure and $V_{0}=0$ in steady state.
There are 10 questions to complete. 