# Diodes Applications

 Question 1
In the circuit shown below, $D_{1}$ and $D_{2}$ are silicon diodes with cut-in voltage of $0.7 \mathrm{~V}$. $V_{\text {IN }}$ and $V_{\text {OUT }}$ are input and output voltages in volts. The transfer characteristic is

 A A B B C C D D
GATE EC 2023   Analog Circuits
Question 1 Explanation:
Case I:
\begin{aligned} V_{\gamma}&=0.7 \mathrm{~V} \\ \text { For the +ve half cycle } &\text { if input } V_{\text {in }} \\ D_{1} & \rightarrow O \mathrm{ON} \text { and } D_{2} \rightarrow \text { OFF } \\ \text { For diode } D_{1}:& \quad V_{\text {in }}-1 V \gt 0.7 \\ V_{\text {in }} & \gt 1.7 \mathrm{~V} \\ V_{0}&=V_{\text {in }}-0.7 \end{aligned}

Case II:
For the + ve half cycle if input $V_{\text {in }}$,
$D_{1} \rightarrow \mathrm{OFF}$ and $D_{2} \rightarrow \mathrm{ON}$

For diode $D_{2}: \quad 1-V_{\text {in }} \gt 0.7$
$V_{\text {in }} \lt 0.3 \mathrm{~V}$
$V_{0}=V_{\text {in }}+0.7$

Case III:
\begin{aligned} 0.3 \mathrm{~V} & \lt V_{\text {in }} \lt 1.7 \mathrm{~V} \\ D_{1} & \rightarrow \mathrm{OFF} \text { and } D_{2} \rightarrow \mathrm{OFF} \\ V_{0} & =1 \mathrm{~V} \end{aligned}
Transfer characteristics,

 Question 2
A circuit and the characteristics of the diode (D) in it are shown. The ratio of the minimum to the maximum small signal voltage gain $\frac{\partial V_{out}}{\partial V_{in}}$ is ________ (rounded off to two decimal places)

 A 0.25 B 0.55 C 0.75 D 0.95
GATE EC 2022   Analog Circuits
Question 2 Explanation:
Replacing the given circuit with small signal equivalent.

Case-I when diode is ON
As $r_d(ON)=0,$ the $2k\Omega$ resistor in parallel to the diode becomes open circuit.
$\therefore \; V_{out}=V_{IN}\times \frac{2}{4}=\frac{V_{in}}{2}$
$\therefore \; \frac{\partial V_{out}}{\partial V_{in}}|_{max}=\frac{1}{2}\;\;\;...(i)$
Case-I: When diode is off:
$r_d(off)=\infty \Rightarrow total \; R_{eq}=2+2+2=6k\Omega$
$\therefore \; V_{out}=\frac{V_{in} \times 4}{6}=\frac{2}{3}V_{in}\Rightarrow \frac{\partial V_{out}}{\partial V_{in}}|_{min}=\frac{2}{3}\;\;\;...(ii)$
From (i) and (ii)
$\frac{\left (\frac{\partial V_{out}}{\partial V_{in}}\right )_{min}}{\left (\frac{\partial V_{out}}{\partial V_{in}}\right )_{max}}=\frac{1/2}{2/3}=0.75$

 Question 3
An asymmetrical periodic pulse train $v_{in}$ of $10\:V$ amplitude with on-time $T_{\text{ON}}=1\:ms$ and off-time $T_{\text{OFF}}=1\:\mu s$ is applied to the circuit shown in the figure. The diode $D_{1}$ is ideal.

The difference between the maximum voltage and minimum voltage of the output waveform $v_{o}$ (in integer) is ______________ V.
 A 7 B 5 C 12 D 10
GATE EC 2021   Analog Circuits
Question 3 Explanation:
$V_{\text{in}} = 10 V:$ Diode is ON

$\therefore$Capacitor charges upto $10 \mathrm{~V},$
\begin{aligned} \therefore \qquad V_{C}&=10 \mathrm{~V} \\ V_{\text {in }}&=0 ; \text { Diode is OFF } \end{aligned}

Discharging time constant $=R \times C$
\begin{aligned} &=10 \mathrm{~m} \mathrm{sec} \\ \tau_{\text {discharging }} &>>\tau_{\mathrm{OFF}} \end{aligned}
Capacitor discharges negligibly
\begin{aligned} \therefore\qquad V_{C}&=10 \mathrm{~V}\\ \text{In steady state},\qquad V_{C} &=10 \mathrm{~V} \\ V_{\text {out }} &=V_{\text {in }}-V_{C}=V_{\text {in }}-10 \mathrm{~V}\\ \text{When }\qquad V_{\text {in }}&=10 \mathrm{~V}\\ \Rightarrow\qquad V_{\text {out }} &=10-10=0 \mathrm{~V} \\ V_{\text {in }} &=10 \mathrm{~V} \\ \mathrm{~V}_{\text {out }} &=0-10=-10 \mathrm{~V}\\ \Rightarrow\qquad V_{\text {out(max) }}-V_{\text {out(min) }}&=0-(-10)=10 \mathrm{~V} \end{aligned}

 Question 4
In the circuit shown below, all the components are ideal and the input voltage is sinusoidal. The magnitude of the steady-state output $V_0$ (rounded off to two decimal places) is _________ V.
 A 325.2 B 650.4 C 125.45 D 752.36
GATE EC 2020   Analog Circuits
Question 4 Explanation:
Voltage Doubles, $V_{o}=2\: V_{m}=2\times 230\sqrt{2}\cong 650.4V$
 Question 5
In the circuit shown, $V_s$ is a 10 V square wave of period, T=4 ms with R= 500$\Omega$ and C = 10 $\mu F$. The capacitor is initially uncharged at t=0, and the diode is assumed to be ideal. The voltage across the capacitor ($V_c$) at 3 ms is equal to ____ volts (rounded off to one decimal place).
 A 2.8 B 3.3 C 4.6 D 5.4
GATE EC 2019   Analog Circuits
Question 5 Explanation:

\begin{aligned} \tau &=R C=500 \times 10 \times 10-6=5 \mathrm{m}_{8} \\ 0 \lt t \lt \frac{t}{2} \; :\; \; v_{\mathrm{cap}} &=v_{f}+\left(v_{i}-v_{f}\right) e^{-t / \tau} \\ &=10+(0-10) e^{-t / \mathrm{Rc}}\\ \text{At }t&=2 \mathrm{msec,} \\ v_{\mathrm{cap}}&=10-10 e^{\frac{-2 \times 10^{-3}}{5 \times 10^{-3}}}\\ &=3.296 \mathrm{V} \simeq 3.3 \mathrm{V} \end{aligned}
For $2 \mathrm{ms} \lt t \lt 4 \mathrm{ms},$ diode is OFF and Capacitor
has no path to discharge. Hence, at t=3 ms $V_{\text {cap }}=3.3 \mathrm{V}$

There are 5 questions to complete.