FET and MOSFET Analysis


Question 1
In the circuit below, the voltage V_{L} is ____ \_V.
(rounded off to two decimal places)

A
2
B
1.55
C
3.32
D
6.32
GATE EC 2023   Analog Circuits
Question 1 Explanation: 


We know,
\begin{aligned} I_{D} & \propto\left(\frac{W}{L}\right) \\ I_{1} & =1 \mathrm{~mA} \\ I_{2} & =\frac{10}{1} \times 1=10 \mathrm{~mA} \\ I_{3} & =10 \mathrm{~mA} \\ I_{4} & =7 \mathrm{~mA} \\ I_{5} & =5 \mathrm{~mA} \\ I_{0} & =I_{4}-I_{5}=7-5=2 \mathrm{~mA} \\ V_{L} & =2 \times 1=2 \mathrm{~V} \end{aligned}
Question 2
For a MOS capacitor, V_{f b} and V_{t} are the flat-band voltage and the threshold voltage, respectively. The variation of the depletion width \left(W_{\text {dep }}\right) for varying gate voltage \left(V_{g}\right) is best represented by

A
A
B
B
C
C
D
D
GATE EC 2023   Analog Circuits
Question 2 Explanation: 
\because We know V_{G} \lt V_{F B} then accumulation mode.
\therefore In accumulation mode W_{d}=0 because there is no depletion charge.
Now, V_{F B} \lt V_{G} \lt V_{T} \Rightarrow then depletion and inversion mode.
\therefore Depletion width is available.
\therefore V_{G} \gt V_{T} \Rightarrow Strong inversion.
\therefore Depletion width W_{d} \Rightarrow Constant.
And W_{d}=\sqrt{\frac{2 \epsilon\left|\phi_{S}\right|}{q N_{S}}} and \left|\phi_{S}\right| \propto V_{G}
But after strong inversion, W_{d} remains constant.
\therefore Correction option is (B).


Question 3
Consider the circuit shown with an ideal long channel nMOSFET (enhancementmode, substrate is connected to the source). The transistor is appropriately biased in the saturation region with V_{GG} and V_{DD} such that it acts as a linear amplifier. v_i is the small-signal ac input voltage. v_A and v_B represent the small-signal voltages at the nodes A and B, respectively. The value of \frac{v_A}{v_B} is ________ (rounded off to one decimal place).

A
-2
B
2
C
-1
D
1
GATE EC 2022   Analog Circuits
Question 3 Explanation: 
For ac analysis

\begin{aligned} V_A &=-i_d\cdot 4k \\ V_B&=i_d\cdot 2k \\ \frac{V_A}{V_B}&=\frac{-4}{2} \\ \frac{V_A}{V_B}&=-2 \end{aligned}
Question 4
Consider an ideal long channel nMOSFET (enhancement-mode) with gate length 10\mu m and width 100\mu m. The product of electron mobility ( \mu _n) and oxide capacitance per unit area ( C_{OX}) is \mu _n C_{OX}=1mA/V^2. The threshold voltage of the transistor is 1 V. For a gate-to-source voltage V_{GS}=[2-\sin (2t)]V and drain-tosource voltage V_{DS}=1V (substrate connected to the source), the maximum value of the drain-to-source current is ________.
A
40 mA
B
20 mA
C
15 mA
D
5 mA
GATE EC 2022   Analog Circuits
Question 4 Explanation: 
\mu _n Co_x=1mA/V^2; W=100\mu m;L=10\mu m
V_T= \perp V; V_{GS}=[2-\sin 2t]V;V_{DS}=1V

Let,
\begin{aligned} V_{GS} &=3V(max)\\ \Rightarrow V_{DS} &\lt V_{GS}-V_t\\ \because \; 1 &\lt (3-1) \end{aligned}
MOSFET in triode region
\begin{aligned} I_{Dmax}&=\mu _CO_x\left ( \frac{\omega }{L} \right )\left \{ \left ( V_{as \; max}-V_t \right )V_{DS}-\frac{1}{2}V_{DS}^2 \right \}\\ &=1 \times \left ( \frac{100}{10} \right )\left \{ (3-1) \times 1-\frac{1}{2} \times 1^2 \right \}mA\\ &=10(2-1/2)\\ &=15mA \end{aligned}
Question 5
The ideal long channel nMOSFET and pMOSFET devices shown in the circuits have threshold voltages of 1 V and -1 V, respectively. The MOSFET substrates are connected to their respective sources. Ignore leakage currents and assume that the capacitors are initially discharged. For the applied voltages as shown, the steady state voltages are ______

A
V_1=5 V, V_2=5 V
B
V_1=5 V, V_2=4 V
C
V_1=4 V, V_2=5 V
D
V_1=4V, V_2=-5 V
GATE EC 2022   Analog Circuits
Question 5 Explanation: 




There are 5 questions to complete.