# Operational Amplifiers

 Question 1
A circuit with an ideal OPAMP is shown. The Bode plot for the magnitude (in dB) of the gain transfer function $(A_V(j\omega )=V_{out}(j\omega )/V_{in}(j\omega ))$ of the circuit is also provided (here, $\omega$ is the angular frequency in rad/s). The values of $R$ and $C$ are

 A $R=3k\Omega ,C=1\mu F$ B $R=1k\Omega ,C=3\mu F$ C $R=4k\Omega ,C=1\mu F$ D $R=3k\Omega ,C=2\mu F$
GATE EC 2022   Analog Circuits
Question 1 Explanation:

\begin{aligned} \text{maximum gain}&=12dB\\ 20 \times \log A_{max}&=12\\ A_{max}&=4\\ 1+\frac{R_2}{R_1}&=4\\ R_2&=3R_1\\ R&=3 \times 1=3k\Omega \\ \log _{10}\omega _c&=3\\ omega _c&=1000rad/sec\\ omega _c&=\frac{1}{R_3C}\\ C&=\frac{1}{R_3 \times \omega _c}\\ C&=\frac{1}{1000 \times 1000}=1\mu F \end{aligned}
 Question 2
An ideal OPAMP circuit with a sinusoidal input is shown in the figure. The 3 dB frequency is the frequency at which the magnitude of the voltage gain decreases by 3 dB from the maximum value. Which of the options is/are correct?

 A The circuit is a low pass filter. B The circuit is a high pass filter. C The 3 dB frequency is 1000 rad/s. D The 3 dB frequency is (1000/3) rad/s.
GATE EC 2022   Analog Circuits
Question 2 Explanation:
\begin{aligned} \frac{V_{out}}{V_{in}}&=\frac{-2000}{1000+\frac{1}{j\omega \times 10^{-6}}}\\ Gain&=\frac{V_{out}}{V_{in}}\frac{-2}{1+\frac{1}{\left (\frac{j\omega }{1000} \right ) }} \end{aligned}
$\omega \rightarrow \infty \Rightarrow gain=-2$
$\omega \rightarrow 0 \Rightarrow gain=0$
$\omega _c=1000$ rad/sec = cutoff frequency
Hence, it is HPF.
 Question 3
A circuit with an ideal $\text{OPAMP}$ is shown in the figure. A pulse $V_{\text{IN}}$ of $20\:ms$ duration is applied to the input. The capacitors are initially uncharged.

The output voltage $V_{\text{OUT}}$ of this circuit at $t=0^{+}$ (in integer) is _______ V.
 A 15 B -15 C 12 D -12
GATE EC 2021   Analog Circuits
Question 3 Explanation:
At, $t=0^{+}:$ Capacitor is short circuit
\begin{aligned} \therefore\quad V^{-}=V_{\text {in }}=5 \mathrm{~V} \\ V^{+}=0 \mathrm{~V} \end{aligned}

\begin{aligned} \text{If}\qquad V^- &>V^{+} \\ V_{\text {out }} &=-V_{\text {sat }}=-12 \mathrm{~V} \end{aligned}
 Question 4
Consider the circuit with an ideal OPAMP shown in the figure.

Assuming $\left | V_{\text{IN}} \right |\ll \left | V_{\text{CC}} \right |$ and $\left | V_{\text{REF}} \right |\ll \left | V_{\text{CC}} \right |$ , the condition at which $V_{\text{OUT}}$ equals to zero is
 A $V_{\text{IN}}\:=\:V_{\text{REF}}$ B $V_{\text{IN}}\:=\:0.5\:V_{\text{REF}}$ C $V_{\text{IN}}\:=\:2\:V_{\text{REF}}$ D $V_{\text{IN}}\:=\:2\:+\:V_{\text{REF}}$
GATE EC 2021   Analog Circuits
Question 4 Explanation:
For ideal op-amp, $V^{\prime}=V^{+}=0$
KCL at node $\mathrm{V}^{-}:$
\begin{aligned} \frac{V_{\text {IN}}-0}{R}+\frac{\left(-V_{\text {REF }}-0\right)}{R}+\frac{V_{\text {OUT }}-0}{R_{F}} &=0 \\ \frac{V_{\text {OUT }}}{R_{F}} &=\frac{1}{R}\left(V_{\text {REF }}-V_{\text {IN }}\right) \\ V_{\text {OUT }} &=\frac{R_{F}}{R}\left(V_{\text {REF }}-V_{\text {IN }}\right)\\ \text { We want, }\qquad V_{\text {OUT }}&=0 \\ \Rightarrow\qquad V_{\text {REF }}-V_{\text {IN }}&=0 \\ \Rightarrow\qquad V_{\text {IN }}&=V_{\text {REF }} \end{aligned}
 Question 5
For the circuit with an ideal OPAMP shown in the figure. $V_{\text{REF}}$ is fixed.

If $V_{\text{OUT}}=1$ volt for $V_{\text{IN}}-0.1$ volt and $V_{\text{OUT}}=6$ volt for $V_{\text{IN}}=1$ volt, where $V_{\text{OUT}}$ is measured across $R_{L}$ connected at the output of this OPAMP, the value of $R_{F}/R_{\text{IN}}$ is
 A 3.28 B 2.86 C 3.82 D 5.55
GATE EC 2021   Analog Circuits
Question 5 Explanation:
MARKS TO ALL AS PER IIT ANSWER KEY

\begin{aligned} V &=V^{+} \\ \frac{V_{\text {out }} R_{\text {in }}+V_{\text {in }} R_{F}}{R_{\text {in }}+R_{F}} &=\frac{V_{\text {ref }} R_{2}}{R_{1}+R_{2}} \\ \frac{1 \times R_{\text {in }}+0.1 \times R_{F}}{R_{\text {in }}+R_{F}} &=\frac{V_{\text {ref }} R_{2}}{R_{1}+R_{2}} &\ldots(i)\\ \frac{6 R_{\text {in }}+1 \times R_{F}}{R_{\text {in }}+R_{F}} &=\frac{V_{\text {ref }} R_{2}}{R_{1}+R_{2}} &\ldots(ii) \end{aligned}
Equate equation (i) and (ii),
\begin{aligned} 1 \times R_{\text {in }}+0.1 \times R_{F} &=6 \times R_{\text {in }}+1 \times R_{F} \\ -5 R_{\text {in }} &=0.9 R_{F} \\ \therefore \quad \frac{R_{F}}{R_{\text {in }}} &=\frac{-5}{0.9}=-5.55 \end{aligned}
(According to the given data magnitude is taken)
 Question 6
The components in the circuit given below are ideal. If R = 2 $k\Omega$ and C = 1 $\mu F$, the -3 dB cut-off frequency of the circuit in Hz is
 A 14.92 B 34.46 C 59.68 D 79.58
GATE EC 2020   Analog Circuits
Question 6 Explanation:
Op-amp active filter (LPF) inverting type 3 dB cut-off frequency,
$f_{c}=\frac{1}{2\pi RC}=\frac{1}{2\pi \times 2\times 10^{3}\times 10^{-6}}=\frac{500}{2\pi }=79.58Hz$
 Question 7
In the circuit shown below, all the components are ideal. If $V_i$ is +2 V, the current $I_o$ sourced by the op-amp is __________ mA.
 A 4 B 6 C 2 D 1
GATE EC 2020   Analog Circuits
Question 7 Explanation:
\begin{aligned} V_o=(1+1) \times 2&=4V \\ \text{KCL at node } V_o & \\ \frac{2-4}{1k\Omega }I_o+\frac{0-4}{1k\Omega }&=0 \\ -2+I_o-4 &=0 \\ I_o&=6mA \end{aligned}
 Question 8
The components in the circuit shown below are ideal. If the op-amp is in positive feedback and the input voltage $V_i$ is a sine wave of amplitude 1 V, the output voltage $V_o$ is
 A a non-inverted sine wave of 2 V amplitude B an inverted sine wave of 1 V amplitude C a square wave of 5 V amplitude D a constant of either +5 or -5V
GATE EC 2020   Analog Circuits
Question 8 Explanation:

Given circuit is a Schmitt trigger of non-inverting type.
$V_{o}=\pm 5\, V$
$V^{+}=\frac{V_{o}\times 1+V_{i}\times 1}{1+1}=\frac{V_{o}+V}{2}$
let,$V_{o}=-5\, V,\, \, \, \,V^{+}=\frac{-5+V_{i}}{2}$
$V_{o}$ can change from -5 V to +5 V if $V^{+} \gt 0$
i.e. $\frac{-5+V_{i}}{2} \gt 0\Rightarrow V_{i} \gt 5\, V$
similarly, $V_{o}$ can change from -5 V to +5 V if $V_{i} \lt -5\, V$
But given input has peak value 1 V. Hence output cannot change from +5 V to -5 V or -5 V to +5 V.
Output remain constant at +5 V or -5 V.
 Question 9
An op-amp based circuit is implemented as shown below.

In the above circuit, assume the op-amp to be ideal. The voltage (in volts, correct to one decimal place) at node A, connected to the negative input of the op-amp as indicated in the figure is _________.
 A 0.4 B 0.8 C 0.3 D 1
GATE EC 2018   Analog Circuits
Question 9 Explanation:
Applying the concept of virtual ground, we get
\begin{aligned} V_{o}&=-\frac{R_{2}}{R_{1}} \cdot V_{i n}\\ [\therefore & \text{ non-inverting amplifiel}]\\ \therefore \quad V_{o}&=-\frac{31 \mathrm{k} \Omega}{1 \mathrm{k} \Omega} \times 1 \mathrm{V}\\ V_{0}&=-31 \mathrm{V} \lt -15 \mathrm{V} \end{aligned}
which is not possible
Hence, the output voltage of the op-amp is equal to $-15 \mathrm{V}$

Now applying KCL of node 'A', we get.
\begin{aligned} \frac{V_{A}-(-15)}{31 \mathrm{k} \Omega}+\frac{V_{A}-1}{1 \mathrm{k} \Omega} &=0 \\ \frac{V_{A}}{31 \mathrm{k} \Omega}+\frac{V_{A}}{1 \mathrm{k} \Omega} &=\frac{-15}{31 \mathrm{k} \Omega}+\frac{1}{1 \mathrm{k} \Omega} \\ V_{A}\left[\frac{1}{31}+\frac{1}{1}\right] &=-\frac{15}{31}+1 \\ V_{A} &=0.5 \mathrm{V} \end{aligned}
 Question 10
In the circuit shown below, the op-amp is ideal and Zener voltage of the diode is 2.5 volts. At the input, unit step voltage is applied, i.e. $v_{IN}(t)= u(t)$ volts. Also, at t= 0, the voltage across each of the capacitors is zero.
The time t, in milliseconds, at which the output voltage $v_{OUT}$ crosses -10 V is
 A 2.5 B 5 C 7.5 D 10
GATE EC 2018   Analog Circuits
Question 10 Explanation:
$\text{For} \quad t \gt 0,$

$I=\frac{1 V}{1 \mathrm{k} \Omega}=1 \mathrm{mA}$
Till $t=2.5 \mathrm{msec}$, both $V_{1}$ and $V_{2}$ will increase and after $t=2.5 \mathrm{msec}$, $V_{2}=2.5 \mathrm{V}$ and $V_{1}$ increases with time.
\begin{aligned} \text { when } v_{\text {out }}(t) &=-10 \mathrm{V} \\ & V_{1}=7.5 \mathrm{V}\\ \text{So,}\\ \frac{1}{1 \mu F} \int_{0}^{t}(1 \mathrm{m} \mathrm{A}) d t &=7.5 \mathrm{V} \\ 10^{3} t &=7.5 \\ t &=7.5 \mathrm{msec} \end{aligned}
There are 10 questions to complete.