# Analog Electronics

 Question 1
The current gain $(I_{out}/I_{in})$ in the circuit with an ideal current amplifier given below is

 A $\frac{C_f}{C_c}$ B $\frac{-C_f}{C_c}$ C $\frac{C_c}{C_f}$ D $\frac{-C_c}{C_f}$
GATE EE 2022      Operational Amplifiers
Question 1 Explanation:
Redraw the circuit:

From circuit,
\begin{aligned} V_o&=V_c \\ &=\frac{1}{C_f}\int I_{in}dt \\ I_{out}&=C_c\frac{dV_o}{dt} \\ &= C_c\frac{d}{dt}\left ( \frac{1}{C_f} \int I_{in}dt\right )\\ &=\frac{C_c}{C_f}I_{in}\\ \Rightarrow \frac{I_{out}}{I_{in}}&=\frac{C_c}{C_f} \end{aligned}
 Question 2
The output impedance of a non-ideal operational amplifier is denoted by $Z_{out}$. The variation in the magnitude of $Z_{out}$ with increasing frequency, $f$, in the circuit shown below, is best represented by

 A A B B C C D D
GATE EE 2022      Operational Amplifiers
Question 2 Explanation:
Bode plot of negative feedback amplifier:

Given amplifier is a voltage series feedback amplifier.
Therefore, Output impedance is given by
$Z_{out}=\frac{Z_o}{1+A\beta } =\frac{Z_o}{1+A } \;\;\;(\beta=1 \text{ for buffer})$
From Bode plot ; at low frequency, the open loop gain (A) is constant.
when $\omega \uparrow, A \downarrow,Z_{out}\uparrow$
At $A=0, Z_{out}=Z_o\rightarrow constant$
Therefore, $z_{out}$ with frequency represented by

 Question 3
For the circuit shown below with ideal diodes, the output will be

 A $V_{out} =V_{in}$ for $V_{in} \gt 0$ B $V_{out} =V_{in}$ for $V_{in} \lt 0$ C $V_{out} =-V_{in}$ for $V_{in} \gt 0$ D $V_{out} =-V_{in}$ for $V_{in} \lt 0$
GATE EE 2022      Diodes and their Applications
Question 3 Explanation:
Case (i): For positive half cycle of $V_i$
Diode $D_1$ & $D_2$ are in forward biased.
Redraw the circuit:

So, $V_o=V_{in}$
Case (ii): For negative half cycle of $V_i$
Both diodes $D_1$ & $D_2$ are in reverse biased.
Redraw the circuit:

Hence, $V_o=V_{in} \text{ for } V_{in} \gt 0$
 Question 4
The steady state output ($V_{out}$), of the circuit shown below, will

 A saturate to $+V_{DD}$ B saturate to $-V_{EE}$ C become equal to 0.1 V D become equal to -0.1 V
GATE EE 2022      Operational Amplifiers
Question 4 Explanation:
Redraw the circuit:

From circuit,
\begin{aligned} V_{out} &=-\frac{1}{C_1}\int I\cdot dt \\ &= -\frac{1}{R_1C_1}\int 0 \cdot 1dt \\ \\ &=-\frac{0.1}{R_1C_1}\int dt \\ \\ &= -\frac{0.1}{R_1C_1}t \end{aligned}

Hence, $V_{out}=-V_{EE}$
 Question 5
For an ideal MOSFET biased in saturation, the magnitude of the small signal current gain for a common drain amplifier is
 A 0 B 1 C 100 D infinite
GATE EE 2022      Small Signal Analysis
Question 5 Explanation:
For ideal MOSFET, $i_G=0$
Therefore, Current gain, $A_I=\frac{i_s}{i_G}=\infty$
 Question 6
A $\text{CMOS}$ Schmitt-trigger inverter has a low output level of $\text{0 V}$ and a high output level of $\text{5 V}$. It has input thresholds of $\text{1.6 V}$ and $\text{2.4 V}$. The input capacitance and output resistance of the Schmitt-trigger are negligible. The frequency of the oscillator shown is ____________$\text{Hz}$.(Round off to 2 decimal places.)

 A 1245.23 B 3157.56 C 258.36 D 965.24
GATE EE 2021      Operational Amplifiers
Question 6 Explanation:

\begin{aligned} v_{c}(t)&=v_{c \text { final }}+\left[v_{\text {initial }}-v_{c^{\prime}} \text { final }\right] e^{- t / R C} \\ \text { Charging, } \qquad \qquad v_{c}(t)&=5+(1.6-5) e^{-t / R C}\\ &=5-3.4 e^{-t / R C}\\ t=t_{1}, \qquad \qquad v_{c}(t) &= 2.4 \mathrm{~V} \\ 2.4 &=5-3.4 e^{-t / \mathrm{RC}} \\ 3.4 e^{-11 / \mathrm{RC}} &= 2.6 \\ t_{1} &= \ln \left(\frac{3.4}{2.6}\right) R C=0.268 \times R C \end{aligned}
Discharging,
\begin{aligned} v_{c}(t) &=0+(2.4-0) e^{-t / \mathrm{RC}} \\ &=2.4 e^{-t / \mathrm{RC}} \\ t=t_{2}, \qquad v_{c}\left(t_{a}\right) &=1.6 \mathrm{~V} \\ 1.6 &=2.4 e^{-12 / \mathrm{AC}} \\ t_{2} &=\ln \left(\frac{2.4}{1.6}\right) R C=0.405 \times R C \\ T &=t_{1}+t_{2}=(0.268+0.405) \mathrm{RC} \\ T &=0.673 \mathrm{RC} \\ f &=\frac{1}{0.673 R C}=\frac{1}{0.673 \times 10^{4} \times 47 \times 10^{-9}} \\ f &=3157.46 \mathrm{~Hz} \end{aligned}
 Question 7
In the circuit shown, a $\text{5 V}$ Zener diode is used to regulate the voltage across load $R_{0}$. The input is an unregulated DC voltage with a minimum value of $\text{6 V}$ and a maximum value of $\text{8 V}$. The value of $R_{S}$ is $6\;\Omega$. The Zener diode has a maximum rated power dissipation of $\text{2.5 W}$. Assuming the Zener diode to be ideal, the minimum value of $R_{0}$ is _________________ $\Omega$.

 A 25 B 28 C 34 D 30
GATE EE 2021      Diodes and their Applications
Question 7 Explanation:
To calculate $R_{0}$ min' we must find $I_{L}$ max
\begin{aligned} I_{s \min } &=I_{z} \min +I_{L \max } \\ \frac{V_{i \min }-V_{z}}{R_{s}} &=I_{z} \min +I_{L \max } \end{aligned}
For ideal zener diode, $I_{z \min }=0$
\begin{aligned} \frac{V_{i \min }-V_{z}}{R_{s}} &=I_{L \max } \\ \frac{6-5}{6} &=I_{L \max } \\ I_{L} \max &=\frac{1}{6} \mathrm{~A} \\ R_{0} \min &=\frac{V_{z}}{I_{L \max }}=\frac{5}{1 / 6}=30 \Omega \end{aligned}
 Question 8
In the $\text{BJT}$ circuit shown, beta of the $\text{PNP}$ transistor is 100. Assume $V_{\text{BE}}=-0.7\;V$. The voltage across $R_{c}$ will be $\text{5 V}$ when $R_{2}$ is __________ $k \Omega$.
(Round off to 2 decimal places.)

 A 84.25 B 8.25 C 17.06 D 22.04
GATE EE 2021      BJT, FET and their Biasing Circuits
Question 8 Explanation:

\begin{aligned} I_{C}&=\frac{5 \mathrm{~V}}{3.3 \mathrm{k}}=1.515 \mathrm{~mA} \\ I_{E}&=1.53 \mathrm{~mA} \\ I_{B}&=0.0151 \mathrm{~mA}\\ -12+1.2 \mathrm{k} \times 1.53 \mathrm{~m}+& 0.7+V_{B}=0 \\ V_{B} &=9.464 \mathrm{~V} \\ I_{x} &=\frac{12-V_{B}}{4.7 \mathrm{k}}=\frac{12-9.464}{4.7 \mathrm{k}}=0.539 \mathrm{~mA} \\ I_{x}+I_{B} &=I_{y} \\ \Rightarrow \qquad\qquad I_{y} &=0.5396+0.0151 \\ I_{y} &=0.5546 \mathrm{~mA} \\ V_{B} &=0.5546 \mathrm{~m} \times R_{2}=9.464 \\ R_{2} &=17.06 \mathrm{k} \Omega \end{aligned}
 Question 9
The temperature of the coolant oil bath for a transformer is monitored using the circuit shown. It contains a thermistor with a temperature-dependent resistance, $R_{thermistor} = 2(1 + \alpha T) k\Omega$. Where T is the temperature in $^{\circ}C$. The temperature coefficient $\alpha$, is $-(4 \pm 0.25) \%/^{\circ}C$. Circuit parameters: $R_1 = 1 k\Omega , R_2 = 1.3 k\Omega , R_3 = 2.6 k\Omega$. The error in the output signal (in V. rounded off lo 2 decimal places) at 150$^{\circ}C$ is ________.
 A 0.01 B 0.08 C 0.04 D 0.06
GATE EE 2020      Operational Amplifiers
Question 9 Explanation:
As per GATE official answer key MTA (Marks to ALL)
\begin{aligned} \text{Given data,}\\ R_{thermistor}&=R_{th}=2(1+\alpha T)K\Omega \\ \alpha &=-(4+0.25)\%/^{\circ}C=-(0.04\pm 0.0025)^{\circ}C \\ \alpha _{max}&=-0.0424/^{\circ}C, \; \; \alpha _{min}=-0.375/^{\circ}C\\ \text{Temperature, } T&=150^{\circ}C \\ R_{1}&=1 K\Omega ,\; R_{2}=1.3 K\Omega , \; R_{3}=2.6 K\Omega\\ \text{Considering, }\alpha &=-0.04 \\ R_{th}&=2[1-0.04\times 150]=-10 K\Omega \\ V_{0}&=V_{1}\times \frac{R_{1}}{R_{1}+R_{th}}\left [ 1+\frac{R_{2}}{R_{3}} \right ]\\ &=3\times \frac{1k}{1k+10k}\left [ 1+\frac{1.3k}{2.6k} \right ] \\ &=-0.5 V \\ \text{Case-1:} \\ \text{Considering, }\alpha _{max}&=-0.0425/^{\circ}C \\ R_{thmax}&=2[1+(-0.0425)\times 150] =-10.75\, k\Omega \\ V_{0}&=V_{1}\times \frac{R_{1}}{R_{1}+R_{th}}\left [ 1+\frac{R_{2}}{R_{3}} \right ]\\ &=3\times \frac{1k}{1k-10.75k}\left [ 1+\frac{1.3k}{2.6k} \right ] \\ &=-0.46 V \\ \text{Case-2:} \\ \text{Considering, }\alpha _{min}&=-0.0375/^{\circ}C \\ R_{thmin}&=2[1+(-0.0375)\times 150] =-9.25\, k\Omega \\ V_{0} &=3\times \frac{1k}{1k-9.25k}\left [ 1+\frac{1.3k}{2.6k} \right ] \\ &=-0.54 V \\ \text{Output voltage, }\\ V_0&=0.5\pm0.04 \; \Rightarrow \; \text{Error}=0.04 \end{aligned}
 Question 10
The cross-section of a metal-oxide-semiconductor structure is shown schematically. Starting from an uncharged condition, a bias of +3V is applied to the gate contact with respect to the body contact. The charge inside the silicon dioxide layer is then measured to be +Q. The total charge contained within the dashed box shown, upon application of bias, expressed as a multiple of Q (absolute value in Coulombs, rounded off to the nearest integer) is __________ .
 A 0 B 1 C -1 D 2
GATE EE 2020      BJT, FET and their Biasing Circuits
Question 10 Explanation:

Overall charge in side the box $q + q - q - q = 0$ charge

There are 10 questions to complete.