# Combinational Logic Circuits

 Question 1
A counter is constructed with three D flip-flops. The input-output pairs are named $(D_{0},\:Q_{0}), (D_{1},\:Q_{1})$ and $(D_{2},\:Q_{2})$, where the subscript 0 denotes the least significant bit. The output sequence is desired to be the Gray-code sequence $000, \:001, \:011,\: 010, \:110,\:111,\: 101$ and $100$, repeating periodically. Note that the bits are listed in the $Q_{2}\:Q_{1}\:Q_{0}$ format. The combinational logic expression for $D_{1}$ is
 A $Q_{2}Q_{1}Q_{0}$ B $Q_{2}Q_{0}+Q_{1}\overline{Q_{0}}$ C $\overline{Q_{2}}Q_{0}+Q_{1}\overline{Q_{0}}$ D $Q_{2}Q_{1}+\overline{Q_{2}}\:\overline{Q_{1}}$
GATE EE 2021   Digital Electronics
Question 1 Explanation:  $D_{1}=\bar{Q}_{2} Q_{0}+Q_{1} \bar{Q}_{0}$
 Question 2
Consider the following circuit which uses a 2-to-1 multiplexer as shown in the figure below. The Boolean expression for output F in terms of A and B is A $A\oplus B$ B $\overline{A+B}$ C $A+B$ D $\overline{A\oplus B}$
GATE EE 2016-SET-1   Digital Electronics
Question 2 Explanation:
In the given multiplexer,
$I=0=\bar{A}, I_1=A$
$Select =B$
$F=\bar{B}I_0+BI_1$
$F=\bar{B}\bar{A}+AB=\overline{A\oplus B}$

 Question 3
A Boolean function f(A,B,C,D)= $\Pi$(1,5,12,15) is to be implemented using an 8x1 multiplexer (A is MSB). The inputs ABC are connected to the select inputs $S_2S_1S_0$ of the multiplexer respectively. Which one of the following options gives the correct inputs to pins 0,1,2,3,4,5,6,7 in order?
 A $D,0,D,0,0,0,\bar{D},D$ B $\bar{D},1,\bar{D},1,1,1,D,\bar{D}$ C $D,1,D,1,1,1,\bar{D},D$ D $\bar{D},0,\bar{D},0,0,0,\bar{D},D$
GATE EE 2015-SET-2   Digital Electronics
Question 3 Explanation:
Boolean function $f(A,B,C,D)=\Pi (1,5,12,15)$ is implemented with 8x1 MUX Question 4
In the 4 x 1 multiplexer, the output F is given by $F=A\oplus B$. Find the required input '$I_{3}I_{2}I_{1}I_{0}$'. A 1010 B 0110 C 1000 D 1110
GATE EE 2015-SET-1   Digital Electronics
Question 4 Explanation:
$F=A\oplus B$
$\;\;=\bar{A}B+A\bar{B}$
$\;\;=\bar{A}\bar{B}I_0+\bar{A}BI_1+A\bar{B}I_2+ABI_3$
$\Rightarrow \; I_0=0, I_1=1, I_2=1, i_3=0$
$I_3I_2I_1I_0=0110$
 Question 5
A 3-bit gray counter is used to control the output of the multiplexer as shown in the figure. The initial state of the counter is $000_2$. The output is pulled high. The output of the circuit follows the sequence A $I_{0}1,1,I_{1},I_{3},1,1,I_{2}$ B $I_{0},1,I_{1},1,I_{2},1,I_{3},1$ C $1,I_{0},1,I_{1},I_{2},1,I_{3},1$ D $I_{0},I_{1},I_{2},I_{3},I_{0},I_{1},I_{2},I_{3}$
GATE EE 2014-SET-3   Digital Electronics
Question 5 Explanation:
For $\begin{matrix} A_2 & A_1 & A_0 & S_0 & S_1\\ 0 & 0 & 0 & 0 & 0 \end{matrix}$
MUX is enabled and output is $I_0$

For $\begin{matrix} A_2 & A_1 & A_0 & S_0 & S_1\\ 0 & 0 & 1 & 0 & 0 \end{matrix}$
MUX is disable and output is '1'
similarly, for There are 5 questions to complete.