Combinational Logic Circuits

 Question 1
Consider the following circuit which uses a 2-to-1 multiplexer as shown in the figure below. The Boolean expression for output F in terms of A and B is
 A $A\oplus B$ B $\overline{A+B}$ C $A+B$ D $\overline{A\oplus B}$
GATE EE 2016-SET-1   Digital Electronics
Question 1 Explanation:
In the given multiplexer,
$I=0=\bar{A}, I_1=A$
$Select =B$
$F=\bar{B}I_0+BI_1$
$F=\bar{B}\bar{A}+AB=\overline{A\oplus B}$
 Question 2
A Boolean function f(A,B,C,D)= $\Pi$(1,5,12,15) is to be implemented using an 8x1 multiplexer (A is MSB). The inputs ABC are connected to the select inputs $S_2S_1S_0$ of the multiplexer respectively.

Which one of the following options gives the correct inputs to pins 0,1,2,3,4,5,6,7 in order?
 A $D,0,D,0,0,0,\bar{D},D$ B $\bar{D},1,\bar{D},1,1,1,D,\bar{D}$ C $D,1,D,1,1,1,\bar{D},D$ D $\bar{D},0,\bar{D},0,0,0,\bar{D},D$
GATE EE 2015-SET-2   Digital Electronics
Question 2 Explanation:
Boolean function $f(A,B,C,D)=\Pi (1,5,12,15)$ is implemented with 8x1 MUX
 Question 3
In the 4 x 1 multiplexer, the output F is given by $F=A\oplus B$. Find the required input '$I_{3}I_{2}I_{1}I_{0}$'.
 A 1010 B 0110 C 1000 D 1110
GATE EE 2015-SET-1   Digital Electronics
Question 3 Explanation:
$F=A\oplus B$
$\;\;=\bar{A}B+A\bar{B}$
$\;\;=\bar{A}\bar{B}I_0+\bar{A}BI_1+A\bar{B}I_2+ABI_3$
$\Rightarrow \; I_0=0, I_1=1, I_2=1, i_3=0$
$I_3I_2I_1I_0=0110$
 Question 4
A 3-bit gray counter is used to control the output of the multiplexer as shown in the figure. The initial state of the counter is $000_2$. The output is pulled high. The output of the circuit follows the sequence
 A $I_{0}1,1,I_{1},I_{3},1,1,I_{2}$ B $I_{0},1,I_{1},1,I_{2},1,I_{3},1$ C $1,I_{0},1,I_{1},I_{2},1,I_{3},1$ D $I_{0},I_{1},I_{2},I_{3},I_{0},I_{1},I_{2},I_{3}$
GATE EE 2014-SET-3   Digital Electronics
Question 4 Explanation:
For $\begin{matrix} A_2 & A_1 & A_0 & S_0 & S_1\\ 0 & 0 & 0 & 0 & 0 \end{matrix}$
MUX is enabled and output is $I_0$

For $\begin{matrix} A_2 & A_1 & A_0 & S_0 & S_1\\ 0 & 0 & 1 & 0 & 0 \end{matrix}$
MUX is disable and output is '1'
similarly, for

 Question 5
The output Y of a 2-bit comparator is logic 1 whenever the 2-bit input A is greater than the 2-bit input B. The number of combinations for which the output is logic 1, is
 A 4 B 6 C 8 D 10
GATE EE 2012   Digital Electronics
Question 5 Explanation:
$\begin{matrix} A & B & No. of cases\\ 01 & 00 & 1\\ 10 &00,01 &2 \\ 11 &00,01,10 &3\\ & & total=6 \end{matrix}$
 Question 6
A 3-line to 8-line decoder, with active low outputs, is used to implement a 3-variable Boolean function as shown in the figure

The simplified form of Boolean function F(A,B,C) implemented in 'Product of Sum' form will be
 A $(X+Z)(\bar{X}+\bar{Y}+\bar{Z})(Y+Z)$ B $(\bar{X}+\bar{Z})(X+Y+Z)(\bar{Y}+\bar{Z})$ C $(\bar{X}+\bar{Y}Z)(\bar{X}+Y+Z)$ $(X+\bar{Y}+Z)(X+Y+\bar{Z})$ D $(\bar{X}+\bar{Y}+\bar{Z})(\bar{X}+Y+\bar{Z})$ $(X+Y+Z)(X+\bar{Y}+\bar{Z})$
GATE EE 2008   Digital Electronics
Question 6 Explanation:
Let us consider active high input

$F=\Sigma (1,3,5,6)=\Pi M(0,2,4,7)$
$\;\;=(Y+Z)\cdot (X+Z)\cdot (\bar{X}+\bar{Y}+\bar{Z})$
 Question 7
A $\left ( 4\times 1 \right )$ MUX is used to implement a 3-input Boolean function as shown in figure. The Boolean function F(A,B,C) implemented is
 A F(A,B,C) = $\Sigma$(1,2,4,6) B F(A,B,C) = $\Sigma$(1,2,6) C F(A,B,C) = $\Sigma$(2,4,5,6) D F(A,B,C) = $\Sigma$(1,5,6)
GATE EE 2006   Digital Electronics
Question 7 Explanation:
$F(A,B,C)=A\bar{B}\bar{C}+\bar{A}\bar{B}C+B\bar{C}$
$\;\;\;\;=\Sigma (1,2,4,6)$

 Question 8
Figure shows a 4 to 1 MUX to be used to implement the sum S of a 1-bit full adder with input bits P and Q and the carry input Cin. Which of the following combinations of inputs to $I_0, I_1, I_2$ and $I_3$ of the MUX will realize the sum S ?
 A $I_{0}$= $I_{1}$ = $C_{in}$; $I_{2}$ = $I_{3}$ =$\bar{C}_{in}$ B $I_{0}$ = $I_{1}$ = $\bar{C}_{in}$; $I_{2}$ = $I_{3}$ = $C_{in}$ C $I_{0}$ = $I_{3}$ = $C_{in}$; $I_{1}$ = $I_{2}$ = $\bar{C}_{in}$ D $I_{0}$ = $I_{3}$ = $\bar{C}_{in}$; $I_{1}$ = $I_{2}$ = $C_{in}$
GATE EE 2003   Digital Electronics
Question 8 Explanation:
For a 4:1 mux

$F=I_0\bar{A}\bar{B}+I_1\bar{A}B+I_2A\bar{B}+I_3AB$

where sum of full adder is $=A\oplus B\oplus C$
 A $\overline{XY}+X$ B $X+Y$ C $\bar{X}+\bar{Y}$ D $XY+\bar{X}$
$\because \;\;F=\Sigma min(1,2,3)$
$\therefore \;\; F=\bar{X}Y+X\bar{Y}+XY =X+\bar{X}Y=X+Y$